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exynos4412-odroid-common.dtsi revision 1.1.1.4.2.2 
      1 /*
      2  * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
      3  * device tree source
      4  *
      5  * This program is free software; you can redistribute it and/or modify
      6  * it under the terms of the GNU General Public License version 2 as
      7  * published by the Free Software Foundation.
      8 */
      9 
     10 #include <dt-bindings/sound/samsung-i2s.h>
     11 #include <dt-bindings/input/input.h>
     12 #include <dt-bindings/clock/maxim,max77686.h>
     13 #include "exynos4412.dtsi"
     14 #include "exynos4412-ppmu-common.dtsi"
     15 #include <dt-bindings/gpio/gpio.h>
     16 #include "exynos-mfc-reserved-memory.dtsi"
     17 
     18 / {
     19 	chosen {
     20 		stdout-path = &serial_1;
     21 	};
     22 
     23 	firmware@204f000 {
     24 		compatible = "samsung,secure-firmware";
     25 		reg = <0x0204F000 0x1000>;
     26 	};
     27 
     28 	gpio_keys {
     29 		compatible = "gpio-keys";
     30 		pinctrl-names = "default";
     31 		pinctrl-0 = <&gpio_power_key>;
     32 
     33 		power_key {
     34 			gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
     35 			linux,code = <KEY_POWER>;
     36 			label = "power key";
     37 			debounce-interval = <10>;
     38 			wakeup-source;
     39 		};
     40 	};
     41 
     42 	sound: sound {
     43 		compatible = "simple-audio-card";
     44 
     45 		simple-audio-card,format = "i2s";
     46 		simple-audio-card,bitclock-master = <&link0_codec>;
     47 		simple-audio-card,frame-master = <&link0_codec>;
     48 
     49 		simple-audio-card,cpu {
     50 			sound-dai = <&i2s0 0>;
     51 			system-clock-frequency = <19200000>;
     52 		};
     53 
     54 		link0_codec: simple-audio-card,codec {
     55 			sound-dai = <&max98090>;
     56 			clocks = <&i2s0 CLK_I2S_CDCLK>;
     57 		};
     58 	};
     59 
     60 	emmc_pwrseq: pwrseq {
     61 		pinctrl-0 = <&sd1_cd>;
     62 		pinctrl-names = "default";
     63 		compatible = "mmc-pwrseq-emmc";
     64 		reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
     65 	};
     66 
     67 	camera {
     68 		status = "okay";
     69 		pinctrl-names = "default";
     70 		pinctrl-0 = <>;
     71 	};
     72 
     73 	fixed-rate-clocks {
     74 		xxti {
     75 			compatible = "samsung,clock-xxti";
     76 			clock-frequency = <0>;
     77 		};
     78 
     79 		xusbxti {
     80 			compatible = "samsung,clock-xusbxti";
     81 			clock-frequency = <24000000>;
     82 		};
     83 	};
     84 
     85 	thermal-zones {
     86 		cpu_thermal: cpu-thermal {
     87 			cooling-maps {
     88 				cooling_map0: map0 {
     89 				     /* Corresponds to 800MHz at freq_table */
     90 				     cooling-device = <&cpu0 7 7>;
     91 				};
     92 				cooling_map1: map1 {
     93 				     /* Corresponds to 200MHz at freq_table */
     94 				     cooling-device = <&cpu0 13 13>;
     95 			       };
     96 		       };
     97 		};
     98 	};
     99 };
    100 
    101 &bus_dmc {
    102 	devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
    103 	vdd-supply = <&buck1_reg>;
    104 	status = "okay";
    105 };
    106 
    107 &bus_acp {
    108 	devfreq = <&bus_dmc>;
    109 	status = "okay";
    110 };
    111 
    112 &bus_c2c {
    113 	devfreq = <&bus_dmc>;
    114 	status = "okay";
    115 };
    116 
    117 &bus_leftbus {
    118 	devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
    119 	vdd-supply = <&buck3_reg>;
    120 	status = "okay";
    121 };
    122 
    123 &bus_rightbus {
    124 	devfreq = <&bus_leftbus>;
    125 	status = "okay";
    126 };
    127 
    128 &bus_display {
    129 	devfreq = <&bus_leftbus>;
    130 	status = "okay";
    131 };
    132 
    133 &bus_fsys {
    134 	devfreq = <&bus_leftbus>;
    135 	status = "okay";
    136 };
    137 
    138 &bus_peri {
    139 	devfreq = <&bus_leftbus>;
    140 	status = "okay";
    141 };
    142 
    143 &bus_mfc {
    144 	devfreq = <&bus_leftbus>;
    145 	status = "okay";
    146 };
    147 
    148 &clock_audss {
    149 	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
    150 			<&clock_audss EXYNOS_MOUT_I2S>,
    151 			<&clock_audss EXYNOS_DOUT_SRP>,
    152 			<&clock_audss EXYNOS_DOUT_AUD_BUS>;
    153 	assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
    154 			<&clock_audss EXYNOS_MOUT_AUDSS>;
    155 	assigned-clock-rates = <0>, <0>, <192000000>, <19200000>;
    156 };
    157 
    158 &cpu0 {
    159 	cpu0-supply = <&buck2_reg>;
    160 };
    161 
    162 /* RSTN signal for eMMC */
    163 &sd1_cd {
    164 	samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
    165 	samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    166 };
    167 
    168 &pinctrl_1 {
    169 	gpio_power_key: power_key {
    170 		samsung,pins = "gpx1-3";
    171 		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
    172 	};
    173 
    174 	max77686_irq: max77686-irq {
    175 		samsung,pins = "gpx3-2";
    176 		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
    177 		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
    178 		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    179 	};
    180 
    181 	hdmi_hpd: hdmi-hpd {
    182 		samsung,pins = "gpx3-7";
    183 		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
    184 	};
    185 };
    186 
    187 &ehci {
    188 	status = "okay";
    189 };
    190 
    191 &exynos_usbphy {
    192 	status = "okay";
    193 };
    194 
    195 &fimc_0 {
    196 	status = "okay";
    197 	assigned-clocks = <&clock CLK_MOUT_FIMC0>,
    198 			<&clock CLK_SCLK_FIMC0>;
    199 	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
    200 	assigned-clock-rates = <0>, <176000000>;
    201 };
    202 
    203 &fimc_1 {
    204 	status = "okay";
    205 	assigned-clocks = <&clock CLK_MOUT_FIMC1>,
    206 			<&clock CLK_SCLK_FIMC1>;
    207 	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
    208 	assigned-clock-rates = <0>, <176000000>;
    209 };
    210 
    211 &fimc_2 {
    212 	status = "okay";
    213 	assigned-clocks = <&clock CLK_MOUT_FIMC2>,
    214 			<&clock CLK_SCLK_FIMC2>;
    215 	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
    216 	assigned-clock-rates = <0>, <176000000>;
    217 };
    218 
    219 &fimc_3 {
    220 	status = "okay";
    221 	assigned-clocks = <&clock CLK_MOUT_FIMC3>,
    222 			<&clock CLK_SCLK_FIMC3>;
    223 	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
    224 	assigned-clock-rates = <0>, <176000000>;
    225 };
    226 
    227 &hdmi {
    228 	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
    229 	pinctrl-names = "default";
    230 	pinctrl-0 = <&hdmi_hpd>;
    231 	vdd-supply = <&ldo8_reg>;
    232 	vdd_osc-supply = <&ldo10_reg>;
    233 	vdd_pll-supply = <&ldo8_reg>;
    234 	ddc = <&i2c_2>;
    235 	status = "okay";
    236 };
    237 
    238 &hdmicec {
    239 	status = "okay";
    240 };
    241 
    242 &hsotg {
    243 	dr_mode = "peripheral";
    244 	status = "okay";
    245 	vusb_d-supply = <&ldo15_reg>;
    246 	vusb_a-supply = <&ldo12_reg>;
    247 };
    248 
    249 &i2c_0 {
    250 	samsung,i2c-sda-delay = <100>;
    251 	samsung,i2c-max-bus-freq = <400000>;
    252 	status = "okay";
    253 
    254 	usb3503: usb3503@8 {
    255 		compatible = "smsc,usb3503";
    256 		reg = <0x08>;
    257 
    258 		intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
    259 		connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
    260 		reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
    261 		initial-mode = <1>;
    262 	};
    263 
    264 	max77686: pmic@9 {
    265 		compatible = "maxim,max77686";
    266 		interrupt-parent = <&gpx3>;
    267 		interrupts = <2 IRQ_TYPE_NONE>;
    268 		pinctrl-names = "default";
    269 		pinctrl-0 = <&max77686_irq>;
    270 		reg = <0x09>;
    271 		#clock-cells = <1>;
    272 
    273 		voltage-regulators {
    274 			ldo1_reg: LDO1 {
    275 				regulator-name = "VDD_ALIVE_1.0V";
    276 				regulator-min-microvolt = <1000000>;
    277 				regulator-max-microvolt = <1000000>;
    278 				regulator-always-on;
    279 			};
    280 
    281 			ldo2_reg: LDO2 {
    282 				regulator-name = "VDDQ_M1_2_1.8V";
    283 				regulator-min-microvolt = <1800000>;
    284 				regulator-max-microvolt = <1800000>;
    285 				regulator-always-on;
    286 			};
    287 
    288 			ldo3_reg: LDO3 {
    289 				regulator-name = "VDDQ_EXT_1.8V";
    290 				regulator-min-microvolt = <1800000>;
    291 				regulator-max-microvolt = <1800000>;
    292 				regulator-always-on;
    293 			};
    294 
    295 			ldo4_reg: LDO4 {
    296 				regulator-name = "VDDQ_MMC2_2.8V";
    297 				regulator-min-microvolt = <2800000>;
    298 				regulator-max-microvolt = <2800000>;
    299 				regulator-boot-on;
    300 			};
    301 
    302 			ldo5_reg: LDO5 {
    303 				regulator-name = "VDDQ_MMC1_3_1.8V";
    304 				regulator-min-microvolt = <1800000>;
    305 				regulator-max-microvolt = <1800000>;
    306 				regulator-always-on;
    307 				regulator-boot-on;
    308 			};
    309 
    310 			ldo6_reg: LDO6 {
    311 				regulator-name = "VDD10_MPLL_1.0V";
    312 				regulator-min-microvolt = <1000000>;
    313 				regulator-max-microvolt = <1000000>;
    314 				regulator-always-on;
    315 			};
    316 
    317 			ldo7_reg: LDO7 {
    318 				regulator-name = "VDD10_XPLL_1.0V";
    319 				regulator-min-microvolt = <1000000>;
    320 				regulator-max-microvolt = <1000000>;
    321 				regulator-always-on;
    322 			};
    323 
    324 			ldo8_reg: LDO8 {
    325 				regulator-name = "VDD10_HDMI_1.0V";
    326 				regulator-min-microvolt = <1000000>;
    327 				regulator-max-microvolt = <1000000>;
    328 			};
    329 
    330 			ldo10_reg: LDO10 {
    331 				regulator-name = "VDDQ_MIPIHSI_1.8V";
    332 				regulator-min-microvolt = <1800000>;
    333 				regulator-max-microvolt = <1800000>;
    334 			};
    335 
    336 			ldo11_reg: LDO11 {
    337 				regulator-name = "VDD18_ABB1_1.8V";
    338 				regulator-min-microvolt = <1800000>;
    339 				regulator-max-microvolt = <1800000>;
    340 				regulator-always-on;
    341 			};
    342 
    343 			ldo12_reg: LDO12 {
    344 				regulator-name = "VDD33_USB_3.3V";
    345 				regulator-min-microvolt = <3300000>;
    346 				regulator-max-microvolt = <3300000>;
    347 				regulator-always-on;
    348 				regulator-boot-on;
    349 			};
    350 
    351 			ldo13_reg: LDO13 {
    352 				regulator-name = "VDDQ_C2C_W_1.8V";
    353 				regulator-min-microvolt = <1800000>;
    354 				regulator-max-microvolt = <1800000>;
    355 				regulator-always-on;
    356 				regulator-boot-on;
    357 			};
    358 
    359 			ldo14_reg: LDO14 {
    360 				regulator-name = "VDD18_ABB0_2_1.8V";
    361 				regulator-min-microvolt = <1800000>;
    362 				regulator-max-microvolt = <1800000>;
    363 				regulator-always-on;
    364 				regulator-boot-on;
    365 			};
    366 
    367 			ldo15_reg: LDO15 {
    368 				regulator-name = "VDD10_HSIC_1.0V";
    369 				regulator-min-microvolt = <1000000>;
    370 				regulator-max-microvolt = <1000000>;
    371 				regulator-always-on;
    372 				regulator-boot-on;
    373 			};
    374 
    375 			ldo16_reg: LDO16 {
    376 				regulator-name = "VDD18_HSIC_1.8V";
    377 				regulator-min-microvolt = <1800000>;
    378 				regulator-max-microvolt = <1800000>;
    379 				regulator-always-on;
    380 				regulator-boot-on;
    381 			};
    382 
    383 			ldo20_reg: LDO20 {
    384 				regulator-name = "LDO20_1.8V";
    385 				regulator-min-microvolt = <1800000>;
    386 				regulator-max-microvolt = <1800000>;
    387 				regulator-boot-on;
    388 			};
    389 
    390 			ldo21_reg: LDO21 {
    391 				regulator-name = "TFLASH_2.8V";
    392 				regulator-min-microvolt = <2800000>;
    393 				regulator-max-microvolt = <2800000>;
    394 				regulator-boot-on;
    395 			};
    396 
    397 			ldo22_reg: LDO22 {
    398 				/*
    399 				 * Only U3 uses it, so let it define the
    400 				 * constraints
    401 				 */
    402 				regulator-name = "LDO22";
    403 				regulator-boot-on;
    404 			};
    405 
    406 			ldo25_reg: LDO25 {
    407 				regulator-name = "VDDQ_LCD_1.8V";
    408 				regulator-min-microvolt = <1800000>;
    409 				regulator-max-microvolt = <1800000>;
    410 				regulator-always-on;
    411 				regulator-boot-on;
    412 			};
    413 
    414 			buck1_reg: BUCK1 {
    415 				regulator-name = "vdd_mif";
    416 				regulator-min-microvolt = <900000>;
    417 				regulator-max-microvolt = <1100000>;
    418 				regulator-always-on;
    419 				regulator-boot-on;
    420 			};
    421 
    422 			buck2_reg: BUCK2 {
    423 				regulator-name = "vdd_arm";
    424 				regulator-min-microvolt = <900000>;
    425 				regulator-max-microvolt = <1350000>;
    426 				regulator-always-on;
    427 				regulator-boot-on;
    428 			};
    429 
    430 			buck3_reg: BUCK3 {
    431 				regulator-name = "vdd_int";
    432 				regulator-min-microvolt = <900000>;
    433 				regulator-max-microvolt = <1050000>;
    434 				regulator-always-on;
    435 				regulator-boot-on;
    436 			};
    437 
    438 			buck4_reg: BUCK4 {
    439 				regulator-name = "vdd_g3d";
    440 				regulator-min-microvolt = <900000>;
    441 				regulator-max-microvolt = <1100000>;
    442 				regulator-microvolt-offset = <50000>;
    443 			};
    444 
    445 			buck5_reg: BUCK5 {
    446 				regulator-name = "VDDQ_CKEM1_2_1.2V";
    447 				regulator-min-microvolt = <1200000>;
    448 				regulator-max-microvolt = <1200000>;
    449 				regulator-always-on;
    450 				regulator-boot-on;
    451 			};
    452 
    453 			buck6_reg: BUCK6 {
    454 				regulator-name = "BUCK6_1.35V";
    455 				regulator-min-microvolt = <1350000>;
    456 				regulator-max-microvolt = <1350000>;
    457 				regulator-always-on;
    458 				regulator-boot-on;
    459 			};
    460 
    461 			buck7_reg: BUCK7 {
    462 				regulator-name = "BUCK7_2.0V";
    463 				regulator-min-microvolt = <2000000>;
    464 				regulator-max-microvolt = <2000000>;
    465 				regulator-always-on;
    466 			};
    467 
    468 			buck8_reg: BUCK8 {
    469 				/*
    470 				 * Constraints set by specific board: X,
    471 				 * X2 and U3.
    472 				 */
    473 				regulator-name = "BUCK8_2.8V";
    474 			};
    475 		};
    476 	};
    477 };
    478 
    479 &i2c_1 {
    480 	status = "okay";
    481 	max98090: max98090@10 {
    482 		compatible = "maxim,max98090";
    483 		reg = <0x10>;
    484 		interrupt-parent = <&gpx0>;
    485 		interrupts = <0 IRQ_TYPE_NONE>;
    486 		clocks = <&i2s0 CLK_I2S_CDCLK>;
    487 		clock-names = "mclk";
    488 		#sound-dai-cells = <0>;
    489 	};
    490 };
    491 
    492 &i2c_2 {
    493 	status = "okay";
    494 };
    495 
    496 &i2c_8 {
    497 	status = "okay";
    498 };
    499 
    500 &i2s0 {
    501 	pinctrl-0 = <&i2s0_bus>;
    502 	pinctrl-names = "default";
    503 	status = "okay";
    504 };
    505 
    506 &mixer {
    507 	status = "okay";
    508 };
    509 
    510 &mshc_0 {
    511 	pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
    512 	pinctrl-names = "default";
    513 	vmmc-supply = <&ldo20_reg>;
    514 	mmc-pwrseq = <&emmc_pwrseq>;
    515 	status = "okay";
    516 
    517 	broken-cd;
    518 	card-detect-delay = <200>;
    519 	samsung,dw-mshc-ciu-div = <3>;
    520 	samsung,dw-mshc-sdr-timing = <2 3>;
    521 	samsung,dw-mshc-ddr-timing = <1 2>;
    522 	bus-width = <8>;
    523 	cap-mmc-highspeed;
    524 };
    525 
    526 &rtc {
    527 	status = "okay";
    528 	clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
    529 	clock-names = "rtc", "rtc_src";
    530 };
    531 
    532 &sdhci_2 {
    533 	bus-width = <4>;
    534 	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
    535 	pinctrl-names = "default";
    536 	vmmc-supply = <&ldo21_reg>;
    537 	vqmmc-supply = <&ldo4_reg>;
    538 	cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
    539 	cd-inverted;
    540 	status = "okay";
    541 };
    542 
    543 &serial_0 {
    544 	status = "okay";
    545 };
    546 
    547 &serial_1 {
    548 	status = "okay";
    549 };
    550 
    551 &tmu {
    552 	vtmu-supply = <&ldo10_reg>;
    553 	status = "okay";
    554 };
    555