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exynos4412-odroid-common.dtsi revision 1.1.1.4.4.2 
      1 // SPDX-License-Identifier: GPL-2.0
      2 /*
      3  * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
      4  * device tree source
      5 */
      6 
      7 #include <dt-bindings/sound/samsung-i2s.h>
      8 #include <dt-bindings/input/input.h>
      9 #include <dt-bindings/clock/maxim,max77686.h>
     10 #include "exynos4412.dtsi"
     11 #include "exynos4412-ppmu-common.dtsi"
     12 #include <dt-bindings/gpio/gpio.h>
     13 #include "exynos-mfc-reserved-memory.dtsi"
     14 
     15 / {
     16 	chosen {
     17 		stdout-path = &serial_1;
     18 	};
     19 
     20 	firmware@204f000 {
     21 		compatible = "samsung,secure-firmware";
     22 		reg = <0x0204F000 0x1000>;
     23 	};
     24 
     25 	gpio_keys {
     26 		compatible = "gpio-keys";
     27 		pinctrl-names = "default";
     28 		pinctrl-0 = <&gpio_power_key>;
     29 
     30 		power_key {
     31 			gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
     32 			linux,code = <KEY_POWER>;
     33 			label = "power key";
     34 			debounce-interval = <10>;
     35 			wakeup-source;
     36 		};
     37 	};
     38 
     39 	sound: sound {
     40 		compatible = "hardkernel,odroid-xu4-audio";
     41 
     42 		cpu {
     43 			sound-dai = <&i2s0 0>;
     44 		};
     45 
     46 		codec {
     47 			sound-dai = <&hdmi>, <&max98090>;
     48 		};
     49 	};
     50 
     51 	emmc_pwrseq: pwrseq {
     52 		pinctrl-0 = <&sd1_cd>;
     53 		pinctrl-names = "default";
     54 		compatible = "mmc-pwrseq-emmc";
     55 		reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
     56 	};
     57 
     58 	fixed-rate-clocks {
     59 		xxti {
     60 			compatible = "samsung,clock-xxti";
     61 			clock-frequency = <0>;
     62 		};
     63 
     64 		xusbxti {
     65 			compatible = "samsung,clock-xusbxti";
     66 			clock-frequency = <24000000>;
     67 		};
     68 	};
     69 
     70 	thermal-zones {
     71 		cpu_thermal: cpu-thermal {
     72 			cooling-maps {
     73 				cooling_map0: map0 {
     74 				     /* Corresponds to 800MHz at freq_table */
     75 				     cooling-device = <&cpu0 7 7>;
     76 				};
     77 				cooling_map1: map1 {
     78 				     /* Corresponds to 200MHz at freq_table */
     79 				     cooling-device = <&cpu0 13 13>;
     80 			       };
     81 		       };
     82 		};
     83 	};
     84 };
     85 
     86 &bus_dmc {
     87 	devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
     88 	vdd-supply = <&buck1_reg>;
     89 	status = "okay";
     90 };
     91 
     92 &bus_acp {
     93 	devfreq = <&bus_dmc>;
     94 	status = "okay";
     95 };
     96 
     97 &bus_c2c {
     98 	devfreq = <&bus_dmc>;
     99 	status = "okay";
    100 };
    101 
    102 &bus_leftbus {
    103 	devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
    104 	vdd-supply = <&buck3_reg>;
    105 	status = "okay";
    106 };
    107 
    108 &bus_rightbus {
    109 	devfreq = <&bus_leftbus>;
    110 	status = "okay";
    111 };
    112 
    113 &bus_display {
    114 	devfreq = <&bus_leftbus>;
    115 	status = "okay";
    116 };
    117 
    118 &bus_fsys {
    119 	devfreq = <&bus_leftbus>;
    120 	status = "okay";
    121 };
    122 
    123 &bus_peri {
    124 	devfreq = <&bus_leftbus>;
    125 	status = "okay";
    126 };
    127 
    128 &bus_mfc {
    129 	devfreq = <&bus_leftbus>;
    130 	status = "okay";
    131 };
    132 
    133 &camera {
    134 	status = "okay";
    135 	pinctrl-names = "default";
    136 	pinctrl-0 = <>;
    137 };
    138 
    139 &clock {
    140 	assigned-clocks = <&clock CLK_FOUT_EPLL>;
    141 	assigned-clock-rates = <45158401>;
    142 };
    143 
    144 &clock_audss {
    145 	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
    146 			<&clock_audss EXYNOS_MOUT_I2S>,
    147 			<&clock_audss EXYNOS_DOUT_SRP>,
    148 			<&clock_audss EXYNOS_DOUT_AUD_BUS>,
    149 			<&clock_audss EXYNOS_DOUT_I2S>;
    150 
    151 	assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
    152 			  <&clock_audss EXYNOS_MOUT_AUDSS>;
    153 
    154 	assigned-clock-rates = <0>, <0>,
    155 			<196608001>,
    156 			<(196608001 / 2)>,
    157 			<(196608001 / 8)>;
    158 };
    159 
    160 &cpu0 {
    161 	cpu0-supply = <&buck2_reg>;
    162 };
    163 
    164 /* RSTN signal for eMMC */
    165 &sd1_cd {
    166 	samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
    167 	samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    168 };
    169 
    170 &pinctrl_1 {
    171 	gpio_power_key: power_key {
    172 		samsung,pins = "gpx1-3";
    173 		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
    174 	};
    175 
    176 	max77686_irq: max77686-irq {
    177 		samsung,pins = "gpx3-2";
    178 		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
    179 		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
    180 		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
    181 	};
    182 
    183 	hdmi_hpd: hdmi-hpd {
    184 		samsung,pins = "gpx3-7";
    185 		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
    186 	};
    187 };
    188 
    189 &ehci {
    190 	status = "okay";
    191 };
    192 
    193 &exynos_usbphy {
    194 	status = "okay";
    195 };
    196 
    197 &fimc_0 {
    198 	status = "okay";
    199 	assigned-clocks = <&clock CLK_MOUT_FIMC0>,
    200 			<&clock CLK_SCLK_FIMC0>;
    201 	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
    202 	assigned-clock-rates = <0>, <176000000>;
    203 };
    204 
    205 &fimc_1 {
    206 	status = "okay";
    207 	assigned-clocks = <&clock CLK_MOUT_FIMC1>,
    208 			<&clock CLK_SCLK_FIMC1>;
    209 	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
    210 	assigned-clock-rates = <0>, <176000000>;
    211 };
    212 
    213 &fimc_2 {
    214 	status = "okay";
    215 	assigned-clocks = <&clock CLK_MOUT_FIMC2>,
    216 			<&clock CLK_SCLK_FIMC2>;
    217 	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
    218 	assigned-clock-rates = <0>, <176000000>;
    219 };
    220 
    221 &fimc_3 {
    222 	status = "okay";
    223 	assigned-clocks = <&clock CLK_MOUT_FIMC3>,
    224 			<&clock CLK_SCLK_FIMC3>;
    225 	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
    226 	assigned-clock-rates = <0>, <176000000>;
    227 };
    228 
    229 &hdmi {
    230 	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
    231 	pinctrl-names = "default";
    232 	pinctrl-0 = <&hdmi_hpd>;
    233 	vdd-supply = <&ldo8_reg>;
    234 	vdd_osc-supply = <&ldo10_reg>;
    235 	vdd_pll-supply = <&ldo8_reg>;
    236 	ddc = <&i2c_2>;
    237 	status = "okay";
    238 };
    239 
    240 &hdmicec {
    241 	status = "okay";
    242 };
    243 
    244 &hsotg {
    245 	dr_mode = "peripheral";
    246 	status = "okay";
    247 	vusb_d-supply = <&ldo15_reg>;
    248 	vusb_a-supply = <&ldo12_reg>;
    249 };
    250 
    251 &i2c_0 {
    252 	samsung,i2c-sda-delay = <100>;
    253 	samsung,i2c-max-bus-freq = <400000>;
    254 	status = "okay";
    255 
    256 	usb3503: usb3503@8 {
    257 		compatible = "smsc,usb3503";
    258 		reg = <0x08>;
    259 
    260 		intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
    261 		connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
    262 		reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
    263 		initial-mode = <1>;
    264 	};
    265 
    266 	max77686: pmic@9 {
    267 		compatible = "maxim,max77686";
    268 		interrupt-parent = <&gpx3>;
    269 		interrupts = <2 IRQ_TYPE_NONE>;
    270 		pinctrl-names = "default";
    271 		pinctrl-0 = <&max77686_irq>;
    272 		reg = <0x09>;
    273 		#clock-cells = <1>;
    274 
    275 		voltage-regulators {
    276 			ldo1_reg: LDO1 {
    277 				regulator-name = "VDD_ALIVE_1.0V";
    278 				regulator-min-microvolt = <1000000>;
    279 				regulator-max-microvolt = <1000000>;
    280 				regulator-always-on;
    281 			};
    282 
    283 			ldo2_reg: LDO2 {
    284 				regulator-name = "VDDQ_M1_2_1.8V";
    285 				regulator-min-microvolt = <1800000>;
    286 				regulator-max-microvolt = <1800000>;
    287 				regulator-always-on;
    288 			};
    289 
    290 			ldo3_reg: LDO3 {
    291 				regulator-name = "VDDQ_EXT_1.8V";
    292 				regulator-min-microvolt = <1800000>;
    293 				regulator-max-microvolt = <1800000>;
    294 				regulator-always-on;
    295 			};
    296 
    297 			ldo4_reg: LDO4 {
    298 				regulator-name = "VDDQ_MMC2_2.8V";
    299 				regulator-min-microvolt = <2800000>;
    300 				regulator-max-microvolt = <2800000>;
    301 				regulator-boot-on;
    302 			};
    303 
    304 			ldo5_reg: LDO5 {
    305 				regulator-name = "VDDQ_MMC1_3_1.8V";
    306 				regulator-min-microvolt = <1800000>;
    307 				regulator-max-microvolt = <1800000>;
    308 				regulator-always-on;
    309 				regulator-boot-on;
    310 			};
    311 
    312 			ldo6_reg: LDO6 {
    313 				regulator-name = "VDD10_MPLL_1.0V";
    314 				regulator-min-microvolt = <1000000>;
    315 				regulator-max-microvolt = <1000000>;
    316 				regulator-always-on;
    317 			};
    318 
    319 			ldo7_reg: LDO7 {
    320 				regulator-name = "VDD10_XPLL_1.0V";
    321 				regulator-min-microvolt = <1000000>;
    322 				regulator-max-microvolt = <1000000>;
    323 				regulator-always-on;
    324 			};
    325 
    326 			ldo8_reg: LDO8 {
    327 				regulator-name = "VDD10_HDMI_1.0V";
    328 				regulator-min-microvolt = <1000000>;
    329 				regulator-max-microvolt = <1000000>;
    330 			};
    331 
    332 			ldo10_reg: LDO10 {
    333 				regulator-name = "VDDQ_MIPIHSI_1.8V";
    334 				regulator-min-microvolt = <1800000>;
    335 				regulator-max-microvolt = <1800000>;
    336 			};
    337 
    338 			ldo11_reg: LDO11 {
    339 				regulator-name = "VDD18_ABB1_1.8V";
    340 				regulator-min-microvolt = <1800000>;
    341 				regulator-max-microvolt = <1800000>;
    342 				regulator-always-on;
    343 			};
    344 
    345 			ldo12_reg: LDO12 {
    346 				regulator-name = "VDD33_USB_3.3V";
    347 				regulator-min-microvolt = <3300000>;
    348 				regulator-max-microvolt = <3300000>;
    349 				regulator-always-on;
    350 				regulator-boot-on;
    351 			};
    352 
    353 			ldo13_reg: LDO13 {
    354 				regulator-name = "VDDQ_C2C_W_1.8V";
    355 				regulator-min-microvolt = <1800000>;
    356 				regulator-max-microvolt = <1800000>;
    357 				regulator-always-on;
    358 				regulator-boot-on;
    359 			};
    360 
    361 			ldo14_reg: LDO14 {
    362 				regulator-name = "VDD18_ABB0_2_1.8V";
    363 				regulator-min-microvolt = <1800000>;
    364 				regulator-max-microvolt = <1800000>;
    365 				regulator-always-on;
    366 				regulator-boot-on;
    367 			};
    368 
    369 			ldo15_reg: LDO15 {
    370 				regulator-name = "VDD10_HSIC_1.0V";
    371 				regulator-min-microvolt = <1000000>;
    372 				regulator-max-microvolt = <1000000>;
    373 				regulator-always-on;
    374 				regulator-boot-on;
    375 			};
    376 
    377 			ldo16_reg: LDO16 {
    378 				regulator-name = "VDD18_HSIC_1.8V";
    379 				regulator-min-microvolt = <1800000>;
    380 				regulator-max-microvolt = <1800000>;
    381 				regulator-always-on;
    382 				regulator-boot-on;
    383 			};
    384 
    385 			ldo20_reg: LDO20 {
    386 				regulator-name = "LDO20_1.8V";
    387 				regulator-min-microvolt = <1800000>;
    388 				regulator-max-microvolt = <1800000>;
    389 				regulator-boot-on;
    390 			};
    391 
    392 			ldo21_reg: LDO21 {
    393 				regulator-name = "TFLASH_2.8V";
    394 				regulator-min-microvolt = <2800000>;
    395 				regulator-max-microvolt = <2800000>;
    396 				regulator-boot-on;
    397 			};
    398 
    399 			ldo22_reg: LDO22 {
    400 				/*
    401 				 * Only U3 uses it, so let it define the
    402 				 * constraints
    403 				 */
    404 				regulator-name = "LDO22";
    405 				regulator-boot-on;
    406 			};
    407 
    408 			ldo25_reg: LDO25 {
    409 				regulator-name = "VDDQ_LCD_1.8V";
    410 				regulator-min-microvolt = <1800000>;
    411 				regulator-max-microvolt = <1800000>;
    412 				regulator-always-on;
    413 				regulator-boot-on;
    414 			};
    415 
    416 			buck1_reg: BUCK1 {
    417 				regulator-name = "vdd_mif";
    418 				regulator-min-microvolt = <900000>;
    419 				regulator-max-microvolt = <1100000>;
    420 				regulator-always-on;
    421 				regulator-boot-on;
    422 			};
    423 
    424 			buck2_reg: BUCK2 {
    425 				regulator-name = "vdd_arm";
    426 				regulator-min-microvolt = <900000>;
    427 				regulator-max-microvolt = <1350000>;
    428 				regulator-always-on;
    429 				regulator-boot-on;
    430 			};
    431 
    432 			buck3_reg: BUCK3 {
    433 				regulator-name = "vdd_int";
    434 				regulator-min-microvolt = <900000>;
    435 				regulator-max-microvolt = <1050000>;
    436 				regulator-always-on;
    437 				regulator-boot-on;
    438 			};
    439 
    440 			buck4_reg: BUCK4 {
    441 				regulator-name = "vdd_g3d";
    442 				regulator-min-microvolt = <900000>;
    443 				regulator-max-microvolt = <1100000>;
    444 				regulator-microvolt-offset = <50000>;
    445 			};
    446 
    447 			buck5_reg: BUCK5 {
    448 				regulator-name = "VDDQ_CKEM1_2_1.2V";
    449 				regulator-min-microvolt = <1200000>;
    450 				regulator-max-microvolt = <1200000>;
    451 				regulator-always-on;
    452 				regulator-boot-on;
    453 			};
    454 
    455 			buck6_reg: BUCK6 {
    456 				regulator-name = "BUCK6_1.35V";
    457 				regulator-min-microvolt = <1350000>;
    458 				regulator-max-microvolt = <1350000>;
    459 				regulator-always-on;
    460 				regulator-boot-on;
    461 			};
    462 
    463 			buck7_reg: BUCK7 {
    464 				regulator-name = "BUCK7_2.0V";
    465 				regulator-min-microvolt = <2000000>;
    466 				regulator-max-microvolt = <2000000>;
    467 				regulator-always-on;
    468 			};
    469 
    470 			buck8_reg: BUCK8 {
    471 				/*
    472 				 * Constraints set by specific board: X,
    473 				 * X2 and U3.
    474 				 */
    475 				regulator-name = "BUCK8_2.8V";
    476 			};
    477 		};
    478 	};
    479 };
    480 
    481 &i2c_1 {
    482 	status = "okay";
    483 	max98090: max98090@10 {
    484 		compatible = "maxim,max98090";
    485 		reg = <0x10>;
    486 		interrupt-parent = <&gpx0>;
    487 		interrupts = <0 IRQ_TYPE_NONE>;
    488 		clocks = <&i2s0 CLK_I2S_CDCLK>;
    489 		clock-names = "mclk";
    490 		#sound-dai-cells = <0>;
    491 	};
    492 };
    493 
    494 &i2c_2 {
    495 	status = "okay";
    496 };
    497 
    498 &i2c_8 {
    499 	status = "okay";
    500 };
    501 
    502 &i2s0 {
    503 	pinctrl-0 = <&i2s0_bus>;
    504 	pinctrl-names = "default";
    505 	status = "okay";
    506 	assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
    507 	assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
    508 };
    509 
    510 &mixer {
    511 	status = "okay";
    512 };
    513 
    514 &mshc_0 {
    515 	pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
    516 	pinctrl-names = "default";
    517 	vmmc-supply = <&ldo20_reg>;
    518 	mmc-pwrseq = <&emmc_pwrseq>;
    519 	status = "okay";
    520 
    521 	broken-cd;
    522 	card-detect-delay = <200>;
    523 	samsung,dw-mshc-ciu-div = <3>;
    524 	samsung,dw-mshc-sdr-timing = <2 3>;
    525 	samsung,dw-mshc-ddr-timing = <1 2>;
    526 	bus-width = <8>;
    527 	cap-mmc-highspeed;
    528 };
    529 
    530 &rtc {
    531 	status = "okay";
    532 	clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
    533 	clock-names = "rtc", "rtc_src";
    534 };
    535 
    536 &sdhci_2 {
    537 	bus-width = <4>;
    538 	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
    539 	pinctrl-names = "default";
    540 	vmmc-supply = <&ldo21_reg>;
    541 	vqmmc-supply = <&ldo4_reg>;
    542 	cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
    543 	cd-inverted;
    544 	status = "okay";
    545 };
    546 
    547 &serial_0 {
    548 	status = "okay";
    549 };
    550 
    551 &serial_1 {
    552 	status = "okay";
    553 };
    554 
    555 &tmu {
    556 	vtmu-supply = <&ldo10_reg>;
    557 	status = "okay";
    558 };
    559