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      1  1.1.1.3  jmcneill // SPDX-License-Identifier: GPL-2.0
      2      1.1  jmcneill /*
      3      1.1  jmcneill  * Device Tree file for ITian Square One SQ201 NAS
      4      1.1  jmcneill  */
      5      1.1  jmcneill 
      6      1.1  jmcneill /dts-v1/;
      7      1.1  jmcneill 
      8      1.1  jmcneill #include "gemini.dtsi"
      9      1.1  jmcneill #include <dt-bindings/input/input.h>
     10      1.1  jmcneill 
     11      1.1  jmcneill / {
     12      1.1  jmcneill 	model = "ITian Square One SQ201";
     13      1.1  jmcneill 	compatible = "itian,sq201", "cortina,gemini";
     14      1.1  jmcneill 	#address-cells = <1>;
     15      1.1  jmcneill 	#size-cells = <1>;
     16      1.1  jmcneill 
     17  1.1.1.4  jmcneill 	memory@0 { /* 128 MB */
     18      1.1  jmcneill 		device_type = "memory";
     19      1.1  jmcneill 		reg = <0x00000000 0x8000000>;
     20      1.1  jmcneill 	};
     21      1.1  jmcneill 
     22      1.1  jmcneill 	chosen {
     23  1.1.1.6  jmcneill 		bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
     24      1.1  jmcneill 		stdout-path = &uart0;
     25      1.1  jmcneill 	};
     26      1.1  jmcneill 
     27      1.1  jmcneill 	gpio_keys {
     28      1.1  jmcneill 		compatible = "gpio-keys";
     29      1.1  jmcneill 
     30  1.1.1.4  jmcneill 		button-setup {
     31  1.1.1.6  jmcneill 			debounce-interval = <100>;
     32      1.1  jmcneill 			wakeup-source;
     33      1.1  jmcneill 			linux,code = <KEY_SETUP>;
     34      1.1  jmcneill 			label = "factory reset";
     35  1.1.1.2  jmcneill 			/* Conflict with NAND flash */
     36      1.1  jmcneill 			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
     37      1.1  jmcneill 		};
     38      1.1  jmcneill 	};
     39      1.1  jmcneill 
     40      1.1  jmcneill 	leds {
     41      1.1  jmcneill 		compatible = "gpio-leds";
     42  1.1.1.4  jmcneill 		led-green-info {
     43      1.1  jmcneill 			label = "sq201:green:info";
     44      1.1  jmcneill 			gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
     45      1.1  jmcneill 			default-state = "on";
     46      1.1  jmcneill 			linux,default-trigger = "heartbeat";
     47      1.1  jmcneill 		};
     48  1.1.1.4  jmcneill 		led-green-usb {
     49      1.1  jmcneill 			label = "sq201:green:usb";
     50      1.1  jmcneill 			gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
     51      1.1  jmcneill 			default-state = "off";
     52      1.1  jmcneill 			linux,default-trigger = "usb-host";
     53      1.1  jmcneill 		};
     54      1.1  jmcneill 	};
     55      1.1  jmcneill 
     56  1.1.1.5  jmcneill 	mdio0: mdio {
     57  1.1.1.5  jmcneill 		compatible = "virtual,mdio-gpio";
     58  1.1.1.5  jmcneill 		/* Uses MDC and MDIO */
     59  1.1.1.5  jmcneill 		gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
     60  1.1.1.5  jmcneill 			<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
     61  1.1.1.5  jmcneill 		#address-cells = <1>;
     62  1.1.1.5  jmcneill 		#size-cells = <0>;
     63  1.1.1.5  jmcneill 
     64  1.1.1.5  jmcneill 		/* This is a Marvell 88E1111 ethernet transciever */
     65  1.1.1.5  jmcneill 		phy0: ethernet-phy@1 {
     66  1.1.1.5  jmcneill 			reg = <1>;
     67  1.1.1.5  jmcneill 		};
     68  1.1.1.5  jmcneill 	};
     69  1.1.1.5  jmcneill 
     70  1.1.1.5  jmcneill 	spi {
     71  1.1.1.5  jmcneill 		compatible = "spi-gpio";
     72  1.1.1.5  jmcneill 		#address-cells = <1>;
     73  1.1.1.5  jmcneill 		#size-cells = <0>;
     74  1.1.1.5  jmcneill 		/* Check pin collisions */
     75  1.1.1.7  jmcneill 		sck-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
     76  1.1.1.7  jmcneill 		miso-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
     77  1.1.1.7  jmcneill 		mosi-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
     78  1.1.1.5  jmcneill 		cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
     79  1.1.1.5  jmcneill 		num-chipselects = <1>;
     80  1.1.1.5  jmcneill 
     81  1.1.1.5  jmcneill 		switch@0 {
     82  1.1.1.5  jmcneill 			compatible = "vitesse,vsc7395";
     83  1.1.1.5  jmcneill 			reg = <0>;
     84  1.1.1.5  jmcneill 			/* Specified for 2.5 MHz or below */
     85  1.1.1.5  jmcneill 			spi-max-frequency = <2500000>;
     86  1.1.1.5  jmcneill 			gpio-controller;
     87  1.1.1.5  jmcneill 			#gpio-cells = <2>;
     88  1.1.1.5  jmcneill 
     89  1.1.1.5  jmcneill 			ports {
     90  1.1.1.5  jmcneill 				#address-cells = <1>;
     91  1.1.1.5  jmcneill 				#size-cells = <0>;
     92  1.1.1.5  jmcneill 
     93  1.1.1.5  jmcneill 				port@0 {
     94  1.1.1.5  jmcneill 					reg = <0>;
     95  1.1.1.5  jmcneill 					label = "lan1";
     96  1.1.1.5  jmcneill 				};
     97  1.1.1.5  jmcneill 				port@1 {
     98  1.1.1.5  jmcneill 					reg = <1>;
     99  1.1.1.5  jmcneill 					label = "lan2";
    100  1.1.1.5  jmcneill 				};
    101  1.1.1.5  jmcneill 				port@2 {
    102  1.1.1.5  jmcneill 					reg = <2>;
    103  1.1.1.5  jmcneill 					label = "lan3";
    104  1.1.1.5  jmcneill 				};
    105  1.1.1.5  jmcneill 				port@3 {
    106  1.1.1.5  jmcneill 					reg = <3>;
    107  1.1.1.5  jmcneill 					label = "lan4";
    108  1.1.1.5  jmcneill 				};
    109  1.1.1.5  jmcneill 				vsc: port@6 {
    110  1.1.1.5  jmcneill 					reg = <6>;
    111  1.1.1.5  jmcneill 					label = "cpu";
    112  1.1.1.5  jmcneill 					ethernet = <&gmac1>;
    113  1.1.1.5  jmcneill 					phy-mode = "rgmii";
    114  1.1.1.5  jmcneill 					fixed-link {
    115  1.1.1.5  jmcneill 						speed = <1000>;
    116  1.1.1.5  jmcneill 						full-duplex;
    117  1.1.1.5  jmcneill 						pause;
    118  1.1.1.5  jmcneill 					};
    119  1.1.1.5  jmcneill 				};
    120  1.1.1.5  jmcneill 			};
    121  1.1.1.5  jmcneill 		};
    122  1.1.1.5  jmcneill 	};
    123  1.1.1.5  jmcneill 
    124  1.1.1.5  jmcneill 
    125      1.1  jmcneill 	soc {
    126      1.1  jmcneill 		flash@30000000 {
    127  1.1.1.6  jmcneill 			status = "okay";
    128  1.1.1.6  jmcneill 			pinctrl-names = "enabled", "disabled";
    129  1.1.1.6  jmcneill 			pinctrl-0 = <&pflash_default_pins>;
    130  1.1.1.6  jmcneill 			pinctrl-1 = <&pflash_disabled_pins>;
    131      1.1  jmcneill 			/* 16MB of flash */
    132      1.1  jmcneill 			reg = <0x30000000 0x01000000>;
    133      1.1  jmcneill 
    134  1.1.1.6  jmcneill 			partitions {
    135  1.1.1.6  jmcneill 				compatible = "redboot-fis";
    136  1.1.1.6  jmcneill 				/* Eraseblock at 0xfe0000 */
    137  1.1.1.6  jmcneill 				fis-index-block = <0x1fc>;
    138      1.1  jmcneill 			};
    139      1.1  jmcneill 		};
    140      1.1  jmcneill 
    141  1.1.1.2  jmcneill 		syscon: syscon@40000000 {
    142  1.1.1.2  jmcneill 			pinctrl {
    143  1.1.1.2  jmcneill 				/*
    144  1.1.1.2  jmcneill 				 * gpio0fgrp cover line 18 used by reset button
    145  1.1.1.2  jmcneill 				 * gpio0ggrp cover line 20 used by info LED
    146  1.1.1.5  jmcneill 				 * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
    147  1.1.1.2  jmcneill 				 * gpio0kgrp cover line 31 used by USB LED
    148  1.1.1.2  jmcneill 				 */
    149  1.1.1.2  jmcneill 				gpio0_default_pins: pinctrl-gpio0 {
    150  1.1.1.2  jmcneill 					mux {
    151  1.1.1.2  jmcneill 						function = "gpio0";
    152  1.1.1.2  jmcneill 						groups = "gpio0fgrp",
    153  1.1.1.6  jmcneill 						"gpio0hgrp";
    154  1.1.1.2  jmcneill 					};
    155  1.1.1.2  jmcneill 				};
    156  1.1.1.5  jmcneill 				/*
    157  1.1.1.5  jmcneill 				 * gpio0dgrp cover lines used by the SPI
    158  1.1.1.5  jmcneill 				 * to the Vitesse G5x chip.
    159  1.1.1.5  jmcneill 				 */
    160  1.1.1.5  jmcneill 				gpio1_default_pins: pinctrl-gpio1 {
    161  1.1.1.5  jmcneill 					mux {
    162  1.1.1.5  jmcneill 						function = "gpio1";
    163  1.1.1.5  jmcneill 						groups = "gpio1dgrp";
    164  1.1.1.5  jmcneill 					};
    165  1.1.1.5  jmcneill 				};
    166  1.1.1.6  jmcneill 				/*
    167  1.1.1.6  jmcneill 				 * These GPIO groups will be mapped in over some
    168  1.1.1.6  jmcneill 				 * of the flash pins when the flash is not in
    169  1.1.1.6  jmcneill 				 * active use.
    170  1.1.1.6  jmcneill 				 */
    171  1.1.1.6  jmcneill 				pflash_disabled_pins: pinctrl-pflash-disabled {
    172  1.1.1.6  jmcneill 					mux {
    173  1.1.1.6  jmcneill 						function = "gpio0";
    174  1.1.1.6  jmcneill 						groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
    175  1.1.1.6  jmcneill 							 "gpio0kgrp";
    176  1.1.1.6  jmcneill 					};
    177  1.1.1.6  jmcneill 				};
    178  1.1.1.5  jmcneill 				pinctrl-gmii {
    179  1.1.1.5  jmcneill 					mux {
    180  1.1.1.5  jmcneill 						function = "gmii";
    181  1.1.1.5  jmcneill 						groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
    182  1.1.1.5  jmcneill 					};
    183  1.1.1.5  jmcneill 					/* Settings come from memory dump in PLATO */
    184  1.1.1.5  jmcneill 					conf0 {
    185  1.1.1.5  jmcneill 						pins = "V8 GMAC0 RXDV";
    186  1.1.1.5  jmcneill 						skew-delay = <0>;
    187  1.1.1.5  jmcneill 					};
    188  1.1.1.5  jmcneill 					conf1 {
    189  1.1.1.5  jmcneill 						pins = "Y7 GMAC0 RXC";
    190  1.1.1.5  jmcneill 						skew-delay = <15>;
    191  1.1.1.5  jmcneill 					};
    192  1.1.1.5  jmcneill 					conf2 {
    193  1.1.1.5  jmcneill 						pins = "T8 GMAC0 TXEN";
    194  1.1.1.5  jmcneill 						skew-delay = <7>;
    195  1.1.1.5  jmcneill 					};
    196  1.1.1.5  jmcneill 					conf3 {
    197  1.1.1.5  jmcneill 						pins = "U8 GMAC0 TXC";
    198  1.1.1.5  jmcneill 						skew-delay = <10>;
    199  1.1.1.5  jmcneill 					};
    200  1.1.1.5  jmcneill 					conf4 {
    201  1.1.1.5  jmcneill 						pins = "T10 GMAC1 RXDV";
    202  1.1.1.5  jmcneill 						skew-delay = <7>;
    203  1.1.1.5  jmcneill 					};
    204  1.1.1.5  jmcneill 					conf5 {
    205  1.1.1.5  jmcneill 						pins = "Y11 GMAC1 RXC";
    206  1.1.1.5  jmcneill 						skew-delay = <8>;
    207  1.1.1.5  jmcneill 					};
    208  1.1.1.5  jmcneill 					conf6 {
    209  1.1.1.5  jmcneill 						pins = "W11 GMAC1 TXEN";
    210  1.1.1.5  jmcneill 						skew-delay = <7>;
    211  1.1.1.5  jmcneill 					};
    212  1.1.1.5  jmcneill 					conf7 {
    213  1.1.1.5  jmcneill 						pins = "V11 GMAC1 TXC";
    214  1.1.1.5  jmcneill 						skew-delay = <5>;
    215  1.1.1.5  jmcneill 					};
    216  1.1.1.5  jmcneill 					conf8 {
    217  1.1.1.5  jmcneill 						/* The data lines all have default skew */
    218  1.1.1.5  jmcneill 						pins = "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
    219  1.1.1.5  jmcneill 						       "Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
    220  1.1.1.5  jmcneill 						       "T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
    221  1.1.1.5  jmcneill 						       "V7 GMAC0 TXD2", "U7 GMAC0 TXD3",
    222  1.1.1.5  jmcneill 						       "Y12 GMAC1 RXD0", "V12 GMAC1 RXD1",
    223  1.1.1.5  jmcneill 						       "T11 GMAC1 RXD2", "W12 GMAC1 RXD3",
    224  1.1.1.5  jmcneill 						       "U10 GMAC1 TXD0", "Y10 GMAC1 TXD1",
    225  1.1.1.5  jmcneill 						       "W10 GMAC1 TXD2", "T9 GMAC1 TXD3";
    226  1.1.1.5  jmcneill 						skew-delay = <7>;
    227  1.1.1.5  jmcneill 					};
    228  1.1.1.5  jmcneill 					/* Set up drive strength on GMAC0 and GMAC1 to 16 mA */
    229  1.1.1.5  jmcneill 					conf9 {
    230  1.1.1.5  jmcneill 						groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
    231  1.1.1.5  jmcneill 						drive-strength = <16>;
    232  1.1.1.5  jmcneill 					};
    233  1.1.1.5  jmcneill 				};
    234  1.1.1.2  jmcneill 			};
    235  1.1.1.2  jmcneill 		};
    236  1.1.1.2  jmcneill 
    237  1.1.1.2  jmcneill 		sata: sata@46000000 {
    238  1.1.1.2  jmcneill 			cortina,gemini-ata-muxmode = <0>;
    239  1.1.1.2  jmcneill 			cortina,gemini-enable-sata-bridge;
    240  1.1.1.2  jmcneill 			status = "okay";
    241  1.1.1.2  jmcneill 		};
    242  1.1.1.2  jmcneill 
    243  1.1.1.2  jmcneill 		gpio0: gpio@4d000000 {
    244  1.1.1.2  jmcneill 			pinctrl-names = "default";
    245  1.1.1.2  jmcneill 			pinctrl-0 = <&gpio0_default_pins>;
    246  1.1.1.2  jmcneill 		};
    247  1.1.1.2  jmcneill 
    248  1.1.1.5  jmcneill 		gpio1: gpio@4e000000 {
    249  1.1.1.5  jmcneill 			pinctrl-names = "default";
    250  1.1.1.5  jmcneill 			pinctrl-0 = <&gpio1_default_pins>;
    251  1.1.1.5  jmcneill 		};
    252  1.1.1.5  jmcneill 
    253      1.1  jmcneill 		pci@50000000 {
    254      1.1  jmcneill 			status = "okay";
    255      1.1  jmcneill 			interrupt-map-mask = <0xf800 0 0 7>;
    256      1.1  jmcneill 			interrupt-map =
    257      1.1  jmcneill 				<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
    258      1.1  jmcneill 				<0x4800 0 0 2 &pci_intc 1>,
    259      1.1  jmcneill 				<0x4800 0 0 3 &pci_intc 2>,
    260      1.1  jmcneill 				<0x4800 0 0 4 &pci_intc 3>,
    261      1.1  jmcneill 				<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
    262      1.1  jmcneill 				<0x5000 0 0 2 &pci_intc 2>,
    263      1.1  jmcneill 				<0x5000 0 0 3 &pci_intc 3>,
    264      1.1  jmcneill 				<0x5000 0 0 4 &pci_intc 0>,
    265      1.1  jmcneill 				<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
    266      1.1  jmcneill 				<0x5800 0 0 2 &pci_intc 3>,
    267      1.1  jmcneill 				<0x5800 0 0 3 &pci_intc 0>,
    268      1.1  jmcneill 				<0x5800 0 0 4 &pci_intc 1>,
    269      1.1  jmcneill 				<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
    270      1.1  jmcneill 				<0x6000 0 0 2 &pci_intc 0>,
    271      1.1  jmcneill 				<0x6000 0 0 3 &pci_intc 1>,
    272      1.1  jmcneill 				<0x6000 0 0 4 &pci_intc 2>;
    273      1.1  jmcneill 		};
    274  1.1.1.2  jmcneill 
    275  1.1.1.5  jmcneill 		ethernet@60000000 {
    276  1.1.1.5  jmcneill 			status = "okay";
    277  1.1.1.5  jmcneill 
    278  1.1.1.5  jmcneill 			ethernet-port@0 {
    279  1.1.1.5  jmcneill 				phy-mode = "rgmii";
    280  1.1.1.5  jmcneill 				phy-handle = <&phy0>;
    281  1.1.1.5  jmcneill 			};
    282  1.1.1.5  jmcneill 			ethernet-port@1 {
    283  1.1.1.5  jmcneill 				phy-mode = "rgmii";
    284  1.1.1.5  jmcneill 				fixed-link {
    285  1.1.1.5  jmcneill 					speed = <1000>;
    286  1.1.1.5  jmcneill 					full-duplex;
    287  1.1.1.5  jmcneill 					pause;
    288  1.1.1.5  jmcneill 				};
    289  1.1.1.5  jmcneill 			};
    290  1.1.1.5  jmcneill 		};
    291  1.1.1.5  jmcneill 
    292  1.1.1.7  jmcneill 		ide@63000000 {
    293  1.1.1.2  jmcneill 			status = "okay";
    294  1.1.1.2  jmcneill 		};
    295  1.1.1.6  jmcneill 
    296  1.1.1.6  jmcneill 		usb@68000000 {
    297  1.1.1.6  jmcneill 			status = "okay";
    298  1.1.1.6  jmcneill 		};
    299  1.1.1.6  jmcneill 
    300  1.1.1.6  jmcneill 		usb@69000000 {
    301  1.1.1.6  jmcneill 			status = "okay";
    302  1.1.1.6  jmcneill 		};
    303      1.1  jmcneill 	};
    304      1.1  jmcneill };
    305