1 1.1.1.2 skrll // SPDX-License-Identifier: GPL-2.0-only 2 1.1 jmcneill /* 3 1.1 jmcneill * Copyright (C) 2012-2013 Linaro Ltd. 4 1.1 jmcneill * Author: Haojian Zhuang <haojian.zhuang (a] linaro.org> 5 1.1 jmcneill */ 6 1.1 jmcneill 7 1.1 jmcneill /dts-v1/; 8 1.1 jmcneill 9 1.1 jmcneill #include "hi3620.dtsi" 10 1.1 jmcneill 11 1.1 jmcneill / { 12 1.1 jmcneill model = "Hisilicon Hi4511 Development Board"; 13 1.1 jmcneill compatible = "hisilicon,hi3620-hi4511"; 14 1.1 jmcneill 15 1.1 jmcneill chosen { 16 1.1 jmcneill bootargs = "root=/dev/ram0"; 17 1.1 jmcneill stdout-path = "serial0:115200n8"; 18 1.1 jmcneill }; 19 1.1 jmcneill 20 1.1.1.3 jmcneill memory@40000000 { 21 1.1 jmcneill device_type = "memory"; 22 1.1 jmcneill reg = <0x40000000 0x20000000>; 23 1.1 jmcneill }; 24 1.1 jmcneill 25 1.1.1.3 jmcneill amba-bus { 26 1.1 jmcneill dual_timer0: dual_timer@800000 { 27 1.1 jmcneill status = "ok"; 28 1.1 jmcneill }; 29 1.1 jmcneill 30 1.1.1.3 jmcneill uart0: serial@b00000 { /* console */ 31 1.1.1.3 jmcneill pinctrl-names = "default", "sleep"; 32 1.1 jmcneill pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>; 33 1.1 jmcneill pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>; 34 1.1 jmcneill status = "ok"; 35 1.1 jmcneill }; 36 1.1 jmcneill 37 1.1.1.3 jmcneill uart1: serial@b01000 { /* modem */ 38 1.1.1.3 jmcneill pinctrl-names = "default", "sleep"; 39 1.1 jmcneill pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>; 40 1.1 jmcneill pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>; 41 1.1 jmcneill status = "ok"; 42 1.1 jmcneill }; 43 1.1 jmcneill 44 1.1.1.3 jmcneill uart2: serial@b02000 { /* audience */ 45 1.1.1.3 jmcneill pinctrl-names = "default", "sleep"; 46 1.1 jmcneill pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>; 47 1.1 jmcneill pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>; 48 1.1 jmcneill status = "ok"; 49 1.1 jmcneill }; 50 1.1 jmcneill 51 1.1.1.3 jmcneill uart3: serial@b03000 { 52 1.1.1.3 jmcneill pinctrl-names = "default", "sleep"; 53 1.1 jmcneill pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>; 54 1.1 jmcneill pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>; 55 1.1 jmcneill status = "ok"; 56 1.1 jmcneill }; 57 1.1 jmcneill 58 1.1.1.3 jmcneill uart4: serial@b04000 { 59 1.1.1.3 jmcneill pinctrl-names = "default", "sleep"; 60 1.1 jmcneill pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>; 61 1.1 jmcneill pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>; 62 1.1 jmcneill status = "ok"; 63 1.1 jmcneill }; 64 1.1 jmcneill 65 1.1 jmcneill pmx0: pinmux@803000 { 66 1.1 jmcneill pinctrl-names = "default"; 67 1.1 jmcneill pinctrl-0 = <&board_pmx_pins>; 68 1.1 jmcneill 69 1.1 jmcneill board_pmx_pins: board_pmx_pins { 70 1.1 jmcneill pinctrl-single,pins = < 71 1.1 jmcneill 0x008 0x0 /* GPIO -- eFUSE_DOUT */ 72 1.1 jmcneill 0x100 0x0 /* USIM_CLK & USIM_DATA (IOMG63) */ 73 1.1 jmcneill >; 74 1.1 jmcneill }; 75 1.1 jmcneill uart0_pmx_func: uart0_pmx_func { 76 1.1 jmcneill pinctrl-single,pins = < 77 1.1 jmcneill 0x0f0 0x0 78 1.1 jmcneill 0x0f4 0x0 /* UART0_RX & UART0_TX */ 79 1.1 jmcneill >; 80 1.1 jmcneill }; 81 1.1 jmcneill uart0_pmx_idle: uart0_pmx_idle { 82 1.1 jmcneill pinctrl-single,pins = < 83 1.1 jmcneill /*0x0f0 0x1*/ /* UART0_CTS & UART0_RTS */ 84 1.1 jmcneill 0x0f4 0x1 /* UART0_RX & UART0_TX */ 85 1.1 jmcneill >; 86 1.1 jmcneill }; 87 1.1 jmcneill uart1_pmx_func: uart1_pmx_func { 88 1.1 jmcneill pinctrl-single,pins = < 89 1.1 jmcneill 0x0f8 0x0 /* UART1_CTS & UART1_RTS (IOMG61) */ 90 1.1 jmcneill 0x0fc 0x0 /* UART1_RX & UART1_TX (IOMG62) */ 91 1.1 jmcneill >; 92 1.1 jmcneill }; 93 1.1 jmcneill uart1_pmx_idle: uart1_pmx_idle { 94 1.1 jmcneill pinctrl-single,pins = < 95 1.1 jmcneill 0x0f8 0x1 /* GPIO (IOMG61) */ 96 1.1 jmcneill 0x0fc 0x1 /* GPIO (IOMG62) */ 97 1.1 jmcneill >; 98 1.1 jmcneill }; 99 1.1 jmcneill uart2_pmx_func: uart2_pmx_func { 100 1.1 jmcneill pinctrl-single,pins = < 101 1.1 jmcneill 0x104 0x2 /* UART2_RXD (IOMG96) */ 102 1.1 jmcneill 0x108 0x2 /* UART2_TXD (IOMG64) */ 103 1.1 jmcneill >; 104 1.1 jmcneill }; 105 1.1 jmcneill uart2_pmx_idle: uart2_pmx_idle { 106 1.1 jmcneill pinctrl-single,pins = < 107 1.1 jmcneill 0x104 0x1 /* GPIO (IOMG96) */ 108 1.1 jmcneill 0x108 0x1 /* GPIO (IOMG64) */ 109 1.1 jmcneill >; 110 1.1 jmcneill }; 111 1.1 jmcneill uart3_pmx_func: uart3_pmx_func { 112 1.1 jmcneill pinctrl-single,pins = < 113 1.1 jmcneill 0x160 0x2 /* UART3_CTS & UART3_RTS (IOMG85) */ 114 1.1 jmcneill 0x164 0x2 /* UART3_RXD & UART3_TXD (IOMG86) */ 115 1.1 jmcneill >; 116 1.1 jmcneill }; 117 1.1 jmcneill uart3_pmx_idle: uart3_pmx_idle { 118 1.1 jmcneill pinctrl-single,pins = < 119 1.1 jmcneill 0x160 0x1 /* GPIO (IOMG85) */ 120 1.1 jmcneill 0x164 0x1 /* GPIO (IOMG86) */ 121 1.1 jmcneill >; 122 1.1 jmcneill }; 123 1.1 jmcneill uart4_pmx_func: uart4_pmx_func { 124 1.1 jmcneill pinctrl-single,pins = < 125 1.1 jmcneill 0x168 0x0 /* UART4_CTS & UART4_RTS (IOMG87) */ 126 1.1 jmcneill 0x16c 0x0 /* UART4_RXD (IOMG88) */ 127 1.1 jmcneill 0x170 0x0 /* UART4_TXD (IOMG93) */ 128 1.1 jmcneill >; 129 1.1 jmcneill }; 130 1.1 jmcneill uart4_pmx_idle: uart4_pmx_idle { 131 1.1 jmcneill pinctrl-single,pins = < 132 1.1 jmcneill 0x168 0x1 /* GPIO (IOMG87) */ 133 1.1 jmcneill 0x16c 0x1 /* GPIO (IOMG88) */ 134 1.1 jmcneill 0x170 0x1 /* GPIO (IOMG93) */ 135 1.1 jmcneill >; 136 1.1 jmcneill }; 137 1.1 jmcneill i2c0_pmx_func: i2c0_pmx_func { 138 1.1 jmcneill pinctrl-single,pins = < 139 1.1 jmcneill 0x0b4 0x0 /* I2C0_SCL & I2C0_SDA (IOMG45) */ 140 1.1 jmcneill >; 141 1.1 jmcneill }; 142 1.1 jmcneill i2c0_pmx_idle: i2c0_pmx_idle { 143 1.1 jmcneill pinctrl-single,pins = < 144 1.1 jmcneill 0x0b4 0x1 /* GPIO (IOMG45) */ 145 1.1 jmcneill >; 146 1.1 jmcneill }; 147 1.1 jmcneill i2c1_pmx_func: i2c1_pmx_func { 148 1.1 jmcneill pinctrl-single,pins = < 149 1.1 jmcneill 0x0b8 0x0 /* I2C1_SCL & I2C1_SDA (IOMG46) */ 150 1.1 jmcneill >; 151 1.1 jmcneill }; 152 1.1 jmcneill i2c1_pmx_idle: i2c1_pmx_idle { 153 1.1 jmcneill pinctrl-single,pins = < 154 1.1 jmcneill 0x0b8 0x1 /* GPIO (IOMG46) */ 155 1.1 jmcneill >; 156 1.1 jmcneill }; 157 1.1 jmcneill i2c2_pmx_func: i2c2_pmx_func { 158 1.1 jmcneill pinctrl-single,pins = < 159 1.1 jmcneill 0x068 0x0 /* I2C2_SCL (IOMG26) */ 160 1.1 jmcneill 0x06c 0x0 /* I2C2_SDA (IOMG27) */ 161 1.1 jmcneill >; 162 1.1 jmcneill }; 163 1.1 jmcneill i2c2_pmx_idle: i2c2_pmx_idle { 164 1.1 jmcneill pinctrl-single,pins = < 165 1.1 jmcneill 0x068 0x1 /* GPIO (IOMG26) */ 166 1.1 jmcneill 0x06c 0x1 /* GPIO (IOMG27) */ 167 1.1 jmcneill >; 168 1.1 jmcneill }; 169 1.1 jmcneill i2c3_pmx_func: i2c3_pmx_func { 170 1.1 jmcneill pinctrl-single,pins = < 171 1.1 jmcneill 0x050 0x2 /* I2C3_SCL (IOMG20) */ 172 1.1 jmcneill 0x054 0x2 /* I2C3_SDA (IOMG21) */ 173 1.1 jmcneill >; 174 1.1 jmcneill }; 175 1.1 jmcneill i2c3_pmx_idle: i2c3_pmx_idle { 176 1.1 jmcneill pinctrl-single,pins = < 177 1.1 jmcneill 0x050 0x1 /* GPIO (IOMG20) */ 178 1.1 jmcneill 0x054 0x1 /* GPIO (IOMG21) */ 179 1.1 jmcneill >; 180 1.1 jmcneill }; 181 1.1 jmcneill spi0_pmx_func: spi0_pmx_func { 182 1.1 jmcneill pinctrl-single,pins = < 183 1.1 jmcneill 0x0d4 0x0 /* SPI0_CLK/SPI0_DI/SPI0_DO (IOMG53) */ 184 1.1 jmcneill 0x0d8 0x0 /* SPI0_CS0 (IOMG54) */ 185 1.1 jmcneill 0x0dc 0x0 /* SPI0_CS1 (IOMG55) */ 186 1.1 jmcneill 0x0e0 0x0 /* SPI0_CS2 (IOMG56) */ 187 1.1 jmcneill 0x0e4 0x0 /* SPI0_CS3 (IOMG57) */ 188 1.1 jmcneill >; 189 1.1 jmcneill }; 190 1.1 jmcneill spi0_pmx_idle: spi0_pmx_idle { 191 1.1 jmcneill pinctrl-single,pins = < 192 1.1 jmcneill 0x0d4 0x1 /* GPIO (IOMG53) */ 193 1.1 jmcneill 0x0d8 0x1 /* GPIO (IOMG54) */ 194 1.1 jmcneill 0x0dc 0x1 /* GPIO (IOMG55) */ 195 1.1 jmcneill 0x0e0 0x1 /* GPIO (IOMG56) */ 196 1.1 jmcneill 0x0e4 0x1 /* GPIO (IOMG57) */ 197 1.1 jmcneill >; 198 1.1 jmcneill }; 199 1.1 jmcneill spi1_pmx_func: spi1_pmx_func { 200 1.1 jmcneill pinctrl-single,pins = < 201 1.1 jmcneill 0x184 0x0 /* SPI1_CLK/SPI1_DI (IOMG98) */ 202 1.1 jmcneill 0x0e8 0x0 /* SPI1_DO (IOMG58) */ 203 1.1 jmcneill 0x0ec 0x0 /* SPI1_CS (IOMG95) */ 204 1.1 jmcneill >; 205 1.1 jmcneill }; 206 1.1 jmcneill spi1_pmx_idle: spi1_pmx_idle { 207 1.1 jmcneill pinctrl-single,pins = < 208 1.1 jmcneill 0x184 0x1 /* GPIO (IOMG98) */ 209 1.1 jmcneill 0x0e8 0x1 /* GPIO (IOMG58) */ 210 1.1 jmcneill 0x0ec 0x1 /* GPIO (IOMG95) */ 211 1.1 jmcneill >; 212 1.1 jmcneill }; 213 1.1 jmcneill kpc_pmx_func: kpc_pmx_func { 214 1.1 jmcneill pinctrl-single,pins = < 215 1.1 jmcneill 0x12c 0x0 /* KEY_IN0 (IOMG73) */ 216 1.1 jmcneill 0x130 0x0 /* KEY_IN1 (IOMG74) */ 217 1.1 jmcneill 0x134 0x0 /* KEY_IN2 (IOMG75) */ 218 1.1 jmcneill 0x10c 0x0 /* KEY_OUT0 (IOMG65) */ 219 1.1 jmcneill 0x110 0x0 /* KEY_OUT1 (IOMG66) */ 220 1.1 jmcneill 0x114 0x0 /* KEY_OUT2 (IOMG67) */ 221 1.1 jmcneill >; 222 1.1 jmcneill }; 223 1.1 jmcneill kpc_pmx_idle: kpc_pmx_idle { 224 1.1 jmcneill pinctrl-single,pins = < 225 1.1 jmcneill 0x12c 0x1 /* GPIO (IOMG73) */ 226 1.1 jmcneill 0x130 0x1 /* GPIO (IOMG74) */ 227 1.1 jmcneill 0x134 0x1 /* GPIO (IOMG75) */ 228 1.1 jmcneill 0x10c 0x1 /* GPIO (IOMG65) */ 229 1.1 jmcneill 0x110 0x1 /* GPIO (IOMG66) */ 230 1.1 jmcneill 0x114 0x1 /* GPIO (IOMG67) */ 231 1.1 jmcneill >; 232 1.1 jmcneill }; 233 1.1 jmcneill gpio_key_func: gpio_key_func { 234 1.1 jmcneill pinctrl-single,pins = < 235 1.1 jmcneill 0x10c 0x1 /* KEY_OUT0/GPIO (IOMG65) */ 236 1.1 jmcneill 0x130 0x1 /* KEY_IN1/GPIO (IOMG74) */ 237 1.1 jmcneill >; 238 1.1 jmcneill }; 239 1.1 jmcneill emmc_pmx_func: emmc_pmx_func { 240 1.1 jmcneill pinctrl-single,pins = < 241 1.1 jmcneill 0x030 0x2 /* eMMC_CMD/eMMC_CLK (IOMG12) */ 242 1.1 jmcneill 0x018 0x0 /* NAND_CS3_N (IOMG6) */ 243 1.1 jmcneill 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */ 244 1.1 jmcneill 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */ 245 1.1 jmcneill 0x02c 0x2 /* eMMC_DATA[0:7] (IOMG10) */ 246 1.1 jmcneill >; 247 1.1 jmcneill }; 248 1.1 jmcneill emmc_pmx_idle: emmc_pmx_idle { 249 1.1 jmcneill pinctrl-single,pins = < 250 1.1 jmcneill 0x030 0x0 /* GPIO (IOMG12) */ 251 1.1 jmcneill 0x018 0x1 /* GPIO (IOMG6) */ 252 1.1 jmcneill 0x024 0x1 /* GPIO (IOMG8) */ 253 1.1 jmcneill 0x028 0x1 /* GPIO (IOMG9) */ 254 1.1 jmcneill 0x02c 0x1 /* GPIO (IOMG10) */ 255 1.1 jmcneill >; 256 1.1 jmcneill }; 257 1.1 jmcneill sd_pmx_func: sd_pmx_func { 258 1.1 jmcneill pinctrl-single,pins = < 259 1.1 jmcneill 0x0bc 0x0 /* SD_CLK/SD_CMD/SD_DATA0/SD_DATA1/SD_DATA2 (IOMG47) */ 260 1.1 jmcneill 0x0c0 0x0 /* SD_DATA3 (IOMG48) */ 261 1.1 jmcneill >; 262 1.1 jmcneill }; 263 1.1 jmcneill sd_pmx_idle: sd_pmx_idle { 264 1.1 jmcneill pinctrl-single,pins = < 265 1.1 jmcneill 0x0bc 0x1 /* GPIO (IOMG47) */ 266 1.1 jmcneill 0x0c0 0x1 /* GPIO (IOMG48) */ 267 1.1 jmcneill >; 268 1.1 jmcneill }; 269 1.1 jmcneill nand_pmx_func: nand_pmx_func { 270 1.1 jmcneill pinctrl-single,pins = < 271 1.1 jmcneill 0x00c 0x0 /* NAND_ALE/NAND_CLE/.../NAND_DATA[0:7] (IOMG3) */ 272 1.1 jmcneill 0x010 0x0 /* NAND_CS1_N (IOMG4) */ 273 1.1 jmcneill 0x014 0x0 /* NAND_CS2_N (IOMG5) */ 274 1.1 jmcneill 0x018 0x0 /* NAND_CS3_N (IOMG6) */ 275 1.1 jmcneill 0x01c 0x0 /* NAND_BUSY0_N (IOMG94) */ 276 1.1 jmcneill 0x020 0x0 /* NAND_BUSY1_N (IOMG7) */ 277 1.1 jmcneill 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */ 278 1.1 jmcneill 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */ 279 1.1 jmcneill 0x02c 0x0 /* NAND_DATA[8:15] (IOMG10) */ 280 1.1 jmcneill >; 281 1.1 jmcneill }; 282 1.1 jmcneill nand_pmx_idle: nand_pmx_idle { 283 1.1 jmcneill pinctrl-single,pins = < 284 1.1 jmcneill 0x00c 0x1 /* GPIO (IOMG3) */ 285 1.1 jmcneill 0x010 0x1 /* GPIO (IOMG4) */ 286 1.1 jmcneill 0x014 0x1 /* GPIO (IOMG5) */ 287 1.1 jmcneill 0x018 0x1 /* GPIO (IOMG6) */ 288 1.1 jmcneill 0x01c 0x1 /* GPIO (IOMG94) */ 289 1.1 jmcneill 0x020 0x1 /* GPIO (IOMG7) */ 290 1.1 jmcneill 0x024 0x1 /* GPIO (IOMG8) */ 291 1.1 jmcneill 0x028 0x1 /* GPIO (IOMG9) */ 292 1.1 jmcneill 0x02c 0x1 /* GPIO (IOMG10) */ 293 1.1 jmcneill >; 294 1.1 jmcneill }; 295 1.1 jmcneill sdio_pmx_func: sdio_pmx_func { 296 1.1 jmcneill pinctrl-single,pins = < 297 1.1 jmcneill 0x0c4 0x0 /* SDIO_CLK/SDIO_CMD/SDIO_DATA[0:3] (IOMG49) */ 298 1.1 jmcneill >; 299 1.1 jmcneill }; 300 1.1 jmcneill sdio_pmx_idle: sdio_pmx_idle { 301 1.1 jmcneill pinctrl-single,pins = < 302 1.1 jmcneill 0x0c4 0x1 /* GPIO (IOMG49) */ 303 1.1 jmcneill >; 304 1.1 jmcneill }; 305 1.1 jmcneill audio_out_pmx_func: audio_out_pmx_func { 306 1.1 jmcneill pinctrl-single,pins = < 307 1.1 jmcneill 0x0f0 0x1 /* GPIO (IOMG59), audio spk & earphone */ 308 1.1 jmcneill >; 309 1.1 jmcneill }; 310 1.1 jmcneill }; 311 1.1 jmcneill 312 1.1 jmcneill pmx1: pinmux@803800 { 313 1.1 jmcneill pinctrl-names = "default"; 314 1.1 jmcneill pinctrl-0 = < &board_pu_pins &board_pd_pins &board_pd_ps_pins 315 1.1 jmcneill &board_np_pins &board_ps_pins &kpc_cfg_func 316 1.1 jmcneill &audio_out_cfg_func>; 317 1.1 jmcneill board_pu_pins: board_pu_pins { 318 1.1 jmcneill pinctrl-single,pins = < 319 1.1 jmcneill 0x014 0 /* GPIO_158 (IOCFG2) */ 320 1.1 jmcneill 0x018 0 /* GPIO_159 (IOCFG3) */ 321 1.1 jmcneill 0x01c 0 /* BOOT_MODE0 (IOCFG4) */ 322 1.1 jmcneill 0x020 0 /* BOOT_MODE1 (IOCFG5) */ 323 1.1 jmcneill >; 324 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 325 1.1 jmcneill pinctrl-single,bias-pullup = <1 1 0 1>; 326 1.1 jmcneill }; 327 1.1 jmcneill board_pd_pins: board_pd_pins { 328 1.1 jmcneill pinctrl-single,pins = < 329 1.1 jmcneill 0x038 0 /* eFUSE_DOUT (IOCFG11) */ 330 1.1 jmcneill 0x150 0 /* ISP_GPIO8 (IOCFG93) */ 331 1.1 jmcneill 0x154 0 /* ISP_GPIO9 (IOCFG94) */ 332 1.1 jmcneill >; 333 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 334 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 335 1.1 jmcneill }; 336 1.1 jmcneill board_pd_ps_pins: board_pd_ps_pins { 337 1.1 jmcneill pinctrl-single,pins = < 338 1.1 jmcneill 0x2d8 0 /* CLK_OUT0 (IOCFG190) */ 339 1.1 jmcneill 0x004 0 /* PMU_SPI_DATA (IOCFG192) */ 340 1.1 jmcneill >; 341 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 342 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 343 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 344 1.1 jmcneill }; 345 1.1 jmcneill board_np_pins: board_np_pins { 346 1.1 jmcneill pinctrl-single,pins = < 347 1.1 jmcneill 0x24c 0 /* KEYPAD_OUT7 (IOCFG155) */ 348 1.1 jmcneill >; 349 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 350 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 351 1.1 jmcneill }; 352 1.1 jmcneill board_ps_pins: board_ps_pins { 353 1.1 jmcneill pinctrl-single,pins = < 354 1.1 jmcneill 0x000 0 /* PMU_SPI_CLK (IOCFG191) */ 355 1.1 jmcneill 0x008 0 /* PMU_SPI_CS_N (IOCFG193) */ 356 1.1 jmcneill >; 357 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 358 1.1 jmcneill }; 359 1.1 jmcneill uart0_cfg_func: uart0_cfg_func { 360 1.1 jmcneill pinctrl-single,pins = < 361 1.1 jmcneill 0x208 0 /* UART0_RXD (IOCFG138) */ 362 1.1 jmcneill 0x20c 0 /* UART0_TXD (IOCFG139) */ 363 1.1 jmcneill >; 364 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 365 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 366 1.1 jmcneill }; 367 1.1 jmcneill uart0_cfg_idle: uart0_cfg_idle { 368 1.1 jmcneill pinctrl-single,pins = < 369 1.1 jmcneill 0x208 0 /* UART0_RXD (IOCFG138) */ 370 1.1 jmcneill 0x20c 0 /* UART0_TXD (IOCFG139) */ 371 1.1 jmcneill >; 372 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 373 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 374 1.1 jmcneill }; 375 1.1 jmcneill uart1_cfg_func: uart1_cfg_func { 376 1.1 jmcneill pinctrl-single,pins = < 377 1.1 jmcneill 0x210 0 /* UART1_CTS (IOCFG140) */ 378 1.1 jmcneill 0x214 0 /* UART1_RTS (IOCFG141) */ 379 1.1 jmcneill 0x218 0 /* UART1_RXD (IOCFG142) */ 380 1.1 jmcneill 0x21c 0 /* UART1_TXD (IOCFG143) */ 381 1.1 jmcneill >; 382 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 383 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 384 1.1 jmcneill }; 385 1.1 jmcneill uart1_cfg_idle: uart1_cfg_idle { 386 1.1 jmcneill pinctrl-single,pins = < 387 1.1 jmcneill 0x210 0 /* UART1_CTS (IOCFG140) */ 388 1.1 jmcneill 0x214 0 /* UART1_RTS (IOCFG141) */ 389 1.1 jmcneill 0x218 0 /* UART1_RXD (IOCFG142) */ 390 1.1 jmcneill 0x21c 0 /* UART1_TXD (IOCFG143) */ 391 1.1 jmcneill >; 392 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 393 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 394 1.1 jmcneill }; 395 1.1 jmcneill uart2_cfg_func: uart2_cfg_func { 396 1.1 jmcneill pinctrl-single,pins = < 397 1.1 jmcneill 0x220 0 /* UART2_CTS (IOCFG144) */ 398 1.1 jmcneill 0x224 0 /* UART2_RTS (IOCFG145) */ 399 1.1 jmcneill 0x228 0 /* UART2_RXD (IOCFG146) */ 400 1.1 jmcneill 0x22c 0 /* UART2_TXD (IOCFG147) */ 401 1.1 jmcneill >; 402 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 403 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 404 1.1 jmcneill }; 405 1.1 jmcneill uart2_cfg_idle: uart2_cfg_idle { 406 1.1 jmcneill pinctrl-single,pins = < 407 1.1 jmcneill 0x220 0 /* GPIO (IOCFG144) */ 408 1.1 jmcneill 0x224 0 /* GPIO (IOCFG145) */ 409 1.1 jmcneill 0x228 0 /* GPIO (IOCFG146) */ 410 1.1 jmcneill 0x22c 0 /* GPIO (IOCFG147) */ 411 1.1 jmcneill >; 412 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 413 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 414 1.1 jmcneill }; 415 1.1 jmcneill uart3_cfg_func: uart3_cfg_func { 416 1.1 jmcneill pinctrl-single,pins = < 417 1.1 jmcneill 0x294 0 /* UART3_CTS (IOCFG173) */ 418 1.1 jmcneill 0x298 0 /* UART3_RTS (IOCFG174) */ 419 1.1 jmcneill 0x29c 0 /* UART3_RXD (IOCFG175) */ 420 1.1 jmcneill 0x2a0 0 /* UART3_TXD (IOCFG176) */ 421 1.1 jmcneill >; 422 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 423 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 424 1.1 jmcneill }; 425 1.1 jmcneill uart3_cfg_idle: uart3_cfg_idle { 426 1.1 jmcneill pinctrl-single,pins = < 427 1.1 jmcneill 0x294 0 /* UART3_CTS (IOCFG173) */ 428 1.1 jmcneill 0x298 0 /* UART3_RTS (IOCFG174) */ 429 1.1 jmcneill 0x29c 0 /* UART3_RXD (IOCFG175) */ 430 1.1 jmcneill 0x2a0 0 /* UART3_TXD (IOCFG176) */ 431 1.1 jmcneill >; 432 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 433 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 434 1.1 jmcneill }; 435 1.1 jmcneill uart4_cfg_func: uart4_cfg_func { 436 1.1 jmcneill pinctrl-single,pins = < 437 1.1 jmcneill 0x2a4 0 /* UART4_CTS (IOCFG177) */ 438 1.1 jmcneill 0x2a8 0 /* UART4_RTS (IOCFG178) */ 439 1.1 jmcneill 0x2ac 0 /* UART4_RXD (IOCFG179) */ 440 1.1 jmcneill 0x2b0 0 /* UART4_TXD (IOCFG180) */ 441 1.1 jmcneill >; 442 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 443 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 444 1.1 jmcneill }; 445 1.1 jmcneill i2c0_cfg_func: i2c0_cfg_func { 446 1.1 jmcneill pinctrl-single,pins = < 447 1.1 jmcneill 0x17c 0 /* I2C0_SCL (IOCFG103) */ 448 1.1 jmcneill 0x180 0 /* I2C0_SDA (IOCFG104) */ 449 1.1 jmcneill >; 450 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 451 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 452 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 453 1.1 jmcneill }; 454 1.1 jmcneill i2c1_cfg_func: i2c1_cfg_func { 455 1.1 jmcneill pinctrl-single,pins = < 456 1.1 jmcneill 0x184 0 /* I2C1_SCL (IOCFG105) */ 457 1.1 jmcneill 0x188 0 /* I2C1_SDA (IOCFG106) */ 458 1.1 jmcneill >; 459 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 460 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 461 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 462 1.1 jmcneill }; 463 1.1 jmcneill i2c2_cfg_func: i2c2_cfg_func { 464 1.1 jmcneill pinctrl-single,pins = < 465 1.1 jmcneill 0x118 0 /* I2C2_SCL (IOCFG79) */ 466 1.1 jmcneill 0x11c 0 /* I2C2_SDA (IOCFG80) */ 467 1.1 jmcneill >; 468 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 469 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 470 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 471 1.1 jmcneill }; 472 1.1 jmcneill i2c3_cfg_func: i2c3_cfg_func { 473 1.1 jmcneill pinctrl-single,pins = < 474 1.1 jmcneill 0x100 0 /* I2C3_SCL (IOCFG73) */ 475 1.1 jmcneill 0x104 0 /* I2C3_SDA (IOCFG74) */ 476 1.1 jmcneill >; 477 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 478 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 479 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 480 1.1 jmcneill }; 481 1.1 jmcneill spi0_cfg_func1: spi0_cfg_func1 { 482 1.1 jmcneill pinctrl-single,pins = < 483 1.1 jmcneill 0x1d4 0 /* SPI0_CLK (IOCFG125) */ 484 1.1 jmcneill 0x1d8 0 /* SPI0_DI (IOCFG126) */ 485 1.1 jmcneill 0x1dc 0 /* SPI0_DO (IOCFG127) */ 486 1.1 jmcneill >; 487 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 488 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 489 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 490 1.1 jmcneill }; 491 1.1 jmcneill spi0_cfg_func2: spi0_cfg_func2 { 492 1.1 jmcneill pinctrl-single,pins = < 493 1.1 jmcneill 0x1e0 0 /* SPI0_CS0 (IOCFG128) */ 494 1.1 jmcneill 0x1e4 0 /* SPI0_CS1 (IOCFG129) */ 495 1.1 jmcneill 0x1e8 0 /* SPI0_CS2 (IOCFG130 */ 496 1.1 jmcneill 0x1ec 0 /* SPI0_CS3 (IOCFG131) */ 497 1.1 jmcneill >; 498 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 499 1.1 jmcneill pinctrl-single,bias-pullup = <1 1 0 1>; 500 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 501 1.1 jmcneill }; 502 1.1 jmcneill spi1_cfg_func1: spi1_cfg_func1 { 503 1.1 jmcneill pinctrl-single,pins = < 504 1.1 jmcneill 0x1f0 0 /* SPI1_CLK (IOCFG132) */ 505 1.1 jmcneill 0x1f4 0 /* SPI1_DI (IOCFG133) */ 506 1.1 jmcneill 0x1f8 0 /* SPI1_DO (IOCFG134) */ 507 1.1 jmcneill >; 508 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 509 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 510 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 511 1.1 jmcneill }; 512 1.1 jmcneill spi1_cfg_func2: spi1_cfg_func2 { 513 1.1 jmcneill pinctrl-single,pins = < 514 1.1 jmcneill 0x1fc 0 /* SPI1_CS (IOCFG135) */ 515 1.1 jmcneill >; 516 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 517 1.1 jmcneill pinctrl-single,bias-pullup = <1 1 0 1>; 518 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 519 1.1 jmcneill }; 520 1.1 jmcneill kpc_cfg_func: kpc_cfg_func { 521 1.1 jmcneill pinctrl-single,pins = < 522 1.1 jmcneill 0x250 0 /* KEY_IN0 (IOCFG156) */ 523 1.1 jmcneill 0x254 0 /* KEY_IN1 (IOCFG157) */ 524 1.1 jmcneill 0x258 0 /* KEY_IN2 (IOCFG158) */ 525 1.1 jmcneill 0x230 0 /* KEY_OUT0 (IOCFG148) */ 526 1.1 jmcneill 0x234 0 /* KEY_OUT1 (IOCFG149) */ 527 1.1 jmcneill 0x238 0 /* KEY_OUT2 (IOCFG150) */ 528 1.1 jmcneill >; 529 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 530 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 531 1.1 jmcneill }; 532 1.1 jmcneill emmc_cfg_func: emmc_cfg_func { 533 1.1 jmcneill pinctrl-single,pins = < 534 1.1 jmcneill 0x0ac 0 /* eMMC_CMD (IOCFG40) */ 535 1.1 jmcneill 0x0b0 0 /* eMMC_CLK (IOCFG41) */ 536 1.1 jmcneill 0x058 0 /* NAND_CS3_N (IOCFG19) */ 537 1.1 jmcneill 0x064 0 /* NAND_BUSY2_N (IOCFG22) */ 538 1.1 jmcneill 0x068 0 /* NAND_BUSY3_N (IOCFG23) */ 539 1.1 jmcneill 0x08c 0 /* NAND_DATA8 (IOCFG32) */ 540 1.1 jmcneill 0x090 0 /* NAND_DATA9 (IOCFG33) */ 541 1.1 jmcneill 0x094 0 /* NAND_DATA10 (IOCFG34) */ 542 1.1 jmcneill 0x098 0 /* NAND_DATA11 (IOCFG35) */ 543 1.1 jmcneill 0x09c 0 /* NAND_DATA12 (IOCFG36) */ 544 1.1 jmcneill 0x0a0 0 /* NAND_DATA13 (IOCFG37) */ 545 1.1 jmcneill 0x0a4 0 /* NAND_DATA14 (IOCFG38) */ 546 1.1 jmcneill 0x0a8 0 /* NAND_DATA15 (IOCFG39) */ 547 1.1 jmcneill >; 548 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 549 1.1 jmcneill pinctrl-single,bias-pullup = <1 1 0 1>; 550 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 551 1.1 jmcneill }; 552 1.1 jmcneill sd_cfg_func1: sd_cfg_func1 { 553 1.1 jmcneill pinctrl-single,pins = < 554 1.1 jmcneill 0x18c 0 /* SD_CLK (IOCFG107) */ 555 1.1 jmcneill 0x190 0 /* SD_CMD (IOCFG108) */ 556 1.1 jmcneill >; 557 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 558 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 559 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 560 1.1 jmcneill }; 561 1.1 jmcneill sd_cfg_func2: sd_cfg_func2 { 562 1.1 jmcneill pinctrl-single,pins = < 563 1.1 jmcneill 0x194 0 /* SD_DATA0 (IOCFG109) */ 564 1.1 jmcneill 0x198 0 /* SD_DATA1 (IOCFG110) */ 565 1.1 jmcneill 0x19c 0 /* SD_DATA2 (IOCFG111) */ 566 1.1 jmcneill 0x1a0 0 /* SD_DATA3 (IOCFG112) */ 567 1.1 jmcneill >; 568 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 569 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 570 1.1 jmcneill pinctrl-single,drive-strength = <0x70 0xf0>; 571 1.1 jmcneill }; 572 1.1 jmcneill nand_cfg_func1: nand_cfg_func1 { 573 1.1 jmcneill pinctrl-single,pins = < 574 1.1 jmcneill 0x03c 0 /* NAND_ALE (IOCFG12) */ 575 1.1 jmcneill 0x040 0 /* NAND_CLE (IOCFG13) */ 576 1.1 jmcneill 0x06c 0 /* NAND_DATA0 (IOCFG24) */ 577 1.1 jmcneill 0x070 0 /* NAND_DATA1 (IOCFG25) */ 578 1.1 jmcneill 0x074 0 /* NAND_DATA2 (IOCFG26) */ 579 1.1 jmcneill 0x078 0 /* NAND_DATA3 (IOCFG27) */ 580 1.1 jmcneill 0x07c 0 /* NAND_DATA4 (IOCFG28) */ 581 1.1 jmcneill 0x080 0 /* NAND_DATA5 (IOCFG29) */ 582 1.1 jmcneill 0x084 0 /* NAND_DATA6 (IOCFG30) */ 583 1.1 jmcneill 0x088 0 /* NAND_DATA7 (IOCFG31) */ 584 1.1 jmcneill 0x08c 0 /* NAND_DATA8 (IOCFG32) */ 585 1.1 jmcneill 0x090 0 /* NAND_DATA9 (IOCFG33) */ 586 1.1 jmcneill 0x094 0 /* NAND_DATA10 (IOCFG34) */ 587 1.1 jmcneill 0x098 0 /* NAND_DATA11 (IOCFG35) */ 588 1.1 jmcneill 0x09c 0 /* NAND_DATA12 (IOCFG36) */ 589 1.1 jmcneill 0x0a0 0 /* NAND_DATA13 (IOCFG37) */ 590 1.1 jmcneill 0x0a4 0 /* NAND_DATA14 (IOCFG38) */ 591 1.1 jmcneill 0x0a8 0 /* NAND_DATA15 (IOCFG39) */ 592 1.1 jmcneill >; 593 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 594 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 595 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 596 1.1 jmcneill }; 597 1.1 jmcneill nand_cfg_func2: nand_cfg_func2 { 598 1.1 jmcneill pinctrl-single,pins = < 599 1.1 jmcneill 0x044 0 /* NAND_RE_N (IOCFG14) */ 600 1.1 jmcneill 0x048 0 /* NAND_WE_N (IOCFG15) */ 601 1.1 jmcneill 0x04c 0 /* NAND_CS0_N (IOCFG16) */ 602 1.1 jmcneill 0x050 0 /* NAND_CS1_N (IOCFG17) */ 603 1.1 jmcneill 0x054 0 /* NAND_CS2_N (IOCFG18) */ 604 1.1 jmcneill 0x058 0 /* NAND_CS3_N (IOCFG19) */ 605 1.1 jmcneill 0x05c 0 /* NAND_BUSY0_N (IOCFG20) */ 606 1.1 jmcneill 0x060 0 /* NAND_BUSY1_N (IOCFG21) */ 607 1.1 jmcneill 0x064 0 /* NAND_BUSY2_N (IOCFG22) */ 608 1.1 jmcneill 0x068 0 /* NAND_BUSY3_N (IOCFG23) */ 609 1.1 jmcneill >; 610 1.1 jmcneill pinctrl-single,bias-pulldown = <0 2 0 2>; 611 1.1 jmcneill pinctrl-single,bias-pullup = <1 1 0 1>; 612 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 613 1.1 jmcneill }; 614 1.1 jmcneill sdio_cfg_func: sdio_cfg_func { 615 1.1 jmcneill pinctrl-single,pins = < 616 1.1 jmcneill 0x1a4 0 /* SDIO0_CLK (IOCG113) */ 617 1.1 jmcneill 0x1a8 0 /* SDIO0_CMD (IOCG114) */ 618 1.1 jmcneill 0x1ac 0 /* SDIO0_DATA0 (IOCG115) */ 619 1.1 jmcneill 0x1b0 0 /* SDIO0_DATA1 (IOCG116) */ 620 1.1 jmcneill 0x1b4 0 /* SDIO0_DATA2 (IOCG117) */ 621 1.1 jmcneill 0x1b8 0 /* SDIO0_DATA3 (IOCG118) */ 622 1.1 jmcneill >; 623 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 624 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 625 1.1 jmcneill pinctrl-single,drive-strength = <0x30 0xf0>; 626 1.1 jmcneill }; 627 1.1 jmcneill audio_out_cfg_func: audio_out_cfg_func { 628 1.1 jmcneill pinctrl-single,pins = < 629 1.1 jmcneill 0x200 0 /* GPIO (IOCFG136) */ 630 1.1 jmcneill 0x204 0 /* GPIO (IOCFG137) */ 631 1.1 jmcneill >; 632 1.1 jmcneill pinctrl-single,bias-pulldown = <2 2 0 2>; 633 1.1 jmcneill pinctrl-single,bias-pullup = <0 1 0 1>; 634 1.1 jmcneill }; 635 1.1 jmcneill }; 636 1.1 jmcneill }; 637 1.1 jmcneill 638 1.1 jmcneill gpio-keys { 639 1.1 jmcneill compatible = "gpio-keys"; 640 1.1 jmcneill 641 1.1 jmcneill call { 642 1.1 jmcneill label = "call"; 643 1.1 jmcneill gpios = <&gpio17 2 0>; 644 1.1 jmcneill linux,code = <169>; /* KEY_PHONE */ 645 1.1 jmcneill }; 646 1.1 jmcneill }; 647 1.1 jmcneill }; 648