Home | History | Annotate | Line # | Download | only in dts
      1  1.1.1.3  jmcneill // SPDX-License-Identifier: GPL-2.0+
      2  1.1.1.3  jmcneill //
      3  1.1.1.3  jmcneill // Copyright 2012 Freescale Semiconductor, Inc.
      4      1.1  jmcneill 
      5      1.1  jmcneill #include "imx23-pinfunc.h"
      6      1.1  jmcneill 
      7      1.1  jmcneill / {
      8      1.1  jmcneill 	#address-cells = <1>;
      9      1.1  jmcneill 	#size-cells = <1>;
     10      1.1  jmcneill 
     11      1.1  jmcneill 	interrupt-parent = <&icoll>;
     12      1.1  jmcneill 	/*
     13      1.1  jmcneill 	 * The decompressor and also some bootloaders rely on a
     14      1.1  jmcneill 	 * pre-existing /chosen node to be available to insert the
     15      1.1  jmcneill 	 * command line and merge other ATAGS info.
     16      1.1  jmcneill 	 */
     17      1.1  jmcneill 	chosen {};
     18      1.1  jmcneill 
     19      1.1  jmcneill 	aliases {
     20      1.1  jmcneill 		gpio0 = &gpio0;
     21      1.1  jmcneill 		gpio1 = &gpio1;
     22      1.1  jmcneill 		gpio2 = &gpio2;
     23      1.1  jmcneill 		serial0 = &auart0;
     24      1.1  jmcneill 		serial1 = &auart1;
     25      1.1  jmcneill 		spi0 = &ssp0;
     26      1.1  jmcneill 		spi1 = &ssp1;
     27      1.1  jmcneill 		usbphy0 = &usbphy0;
     28      1.1  jmcneill 	};
     29      1.1  jmcneill 
     30      1.1  jmcneill 	cpus {
     31      1.1  jmcneill 		#address-cells = <1>;
     32      1.1  jmcneill 		#size-cells = <0>;
     33      1.1  jmcneill 
     34      1.1  jmcneill 		cpu@0 {
     35      1.1  jmcneill 			compatible = "arm,arm926ej-s";
     36      1.1  jmcneill 			device_type = "cpu";
     37      1.1  jmcneill 			reg = <0>;
     38      1.1  jmcneill 		};
     39      1.1  jmcneill 	};
     40      1.1  jmcneill 
     41      1.1  jmcneill 	apb@80000000 {
     42      1.1  jmcneill 		compatible = "simple-bus";
     43      1.1  jmcneill 		#address-cells = <1>;
     44      1.1  jmcneill 		#size-cells = <1>;
     45      1.1  jmcneill 		reg = <0x80000000 0x80000>;
     46      1.1  jmcneill 		ranges;
     47      1.1  jmcneill 
     48      1.1  jmcneill 		apbh@80000000 {
     49      1.1  jmcneill 			compatible = "simple-bus";
     50      1.1  jmcneill 			#address-cells = <1>;
     51      1.1  jmcneill 			#size-cells = <1>;
     52      1.1  jmcneill 			reg = <0x80000000 0x40000>;
     53      1.1  jmcneill 			ranges;
     54      1.1  jmcneill 
     55      1.1  jmcneill 			icoll: interrupt-controller@80000000 {
     56      1.1  jmcneill 				compatible = "fsl,imx23-icoll", "fsl,icoll";
     57      1.1  jmcneill 				interrupt-controller;
     58      1.1  jmcneill 				#interrupt-cells = <1>;
     59      1.1  jmcneill 				reg = <0x80000000 0x2000>;
     60      1.1  jmcneill 			};
     61      1.1  jmcneill 
     62      1.1  jmcneill 			dma_apbh: dma-apbh@80004000 {
     63      1.1  jmcneill 				compatible = "fsl,imx23-dma-apbh";
     64      1.1  jmcneill 				reg = <0x80004000 0x2000>;
     65      1.1  jmcneill 				interrupts = <0 14 20 0
     66      1.1  jmcneill 					      13 13 13 13>;
     67      1.1  jmcneill 				interrupt-names = "empty", "ssp0", "ssp1", "empty",
     68      1.1  jmcneill 						  "gpmi0", "gpmi1", "gpmi2", "gpmi3";
     69      1.1  jmcneill 				#dma-cells = <1>;
     70      1.1  jmcneill 				dma-channels = <8>;
     71      1.1  jmcneill 				clocks = <&clks 15>;
     72      1.1  jmcneill 			};
     73      1.1  jmcneill 
     74      1.1  jmcneill 			ecc@80008000 {
     75      1.1  jmcneill 				reg = <0x80008000 0x2000>;
     76      1.1  jmcneill 				status = "disabled";
     77      1.1  jmcneill 			};
     78      1.1  jmcneill 
     79  1.1.1.6  jmcneill 			nand-controller@8000c000 {
     80      1.1  jmcneill 				compatible = "fsl,imx23-gpmi-nand";
     81      1.1  jmcneill 				#address-cells = <1>;
     82      1.1  jmcneill 				#size-cells = <1>;
     83      1.1  jmcneill 				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
     84      1.1  jmcneill 				reg-names = "gpmi-nand", "bch";
     85      1.1  jmcneill 				interrupts = <56>;
     86      1.1  jmcneill 				interrupt-names = "bch";
     87      1.1  jmcneill 				clocks = <&clks 34>;
     88      1.1  jmcneill 				clock-names = "gpmi_io";
     89      1.1  jmcneill 				dmas = <&dma_apbh 4>;
     90      1.1  jmcneill 				dma-names = "rx-tx";
     91      1.1  jmcneill 				status = "disabled";
     92      1.1  jmcneill 			};
     93      1.1  jmcneill 
     94  1.1.1.4  jmcneill 			ssp0: spi@80010000 {
     95      1.1  jmcneill 				reg = <0x80010000 0x2000>;
     96      1.1  jmcneill 				interrupts = <15>;
     97      1.1  jmcneill 				clocks = <&clks 33>;
     98      1.1  jmcneill 				dmas = <&dma_apbh 1>;
     99      1.1  jmcneill 				dma-names = "rx-tx";
    100      1.1  jmcneill 				status = "disabled";
    101      1.1  jmcneill 			};
    102      1.1  jmcneill 
    103      1.1  jmcneill 			etm@80014000 {
    104      1.1  jmcneill 				reg = <0x80014000 0x2000>;
    105      1.1  jmcneill 				status = "disabled";
    106      1.1  jmcneill 			};
    107      1.1  jmcneill 
    108      1.1  jmcneill 			pinctrl@80018000 {
    109      1.1  jmcneill 				#address-cells = <1>;
    110      1.1  jmcneill 				#size-cells = <0>;
    111      1.1  jmcneill 				compatible = "fsl,imx23-pinctrl", "simple-bus";
    112      1.1  jmcneill 				reg = <0x80018000 0x2000>;
    113      1.1  jmcneill 
    114      1.1  jmcneill 				gpio0: gpio@0 {
    115      1.1  jmcneill 					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
    116      1.1  jmcneill 					reg = <0>;
    117      1.1  jmcneill 					interrupts = <16>;
    118      1.1  jmcneill 					gpio-controller;
    119      1.1  jmcneill 					#gpio-cells = <2>;
    120      1.1  jmcneill 					interrupt-controller;
    121      1.1  jmcneill 					#interrupt-cells = <2>;
    122      1.1  jmcneill 				};
    123      1.1  jmcneill 
    124      1.1  jmcneill 				gpio1: gpio@1 {
    125      1.1  jmcneill 					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
    126      1.1  jmcneill 					reg = <1>;
    127      1.1  jmcneill 					interrupts = <17>;
    128      1.1  jmcneill 					gpio-controller;
    129      1.1  jmcneill 					#gpio-cells = <2>;
    130      1.1  jmcneill 					interrupt-controller;
    131      1.1  jmcneill 					#interrupt-cells = <2>;
    132      1.1  jmcneill 				};
    133      1.1  jmcneill 
    134      1.1  jmcneill 				gpio2: gpio@2 {
    135      1.1  jmcneill 					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
    136      1.1  jmcneill 					reg = <2>;
    137      1.1  jmcneill 					interrupts = <18>;
    138      1.1  jmcneill 					gpio-controller;
    139      1.1  jmcneill 					#gpio-cells = <2>;
    140      1.1  jmcneill 					interrupt-controller;
    141      1.1  jmcneill 					#interrupt-cells = <2>;
    142      1.1  jmcneill 				};
    143      1.1  jmcneill 
    144      1.1  jmcneill 				duart_pins_a: duart@0 {
    145      1.1  jmcneill 					reg = <0>;
    146      1.1  jmcneill 					fsl,pinmux-ids = <
    147      1.1  jmcneill 						MX23_PAD_PWM0__DUART_RX
    148      1.1  jmcneill 						MX23_PAD_PWM1__DUART_TX
    149      1.1  jmcneill 					>;
    150      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_4mA>;
    151      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    152      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_DISABLE>;
    153      1.1  jmcneill 				};
    154      1.1  jmcneill 
    155      1.1  jmcneill 				auart0_pins_a: auart0@0 {
    156      1.1  jmcneill 					reg = <0>;
    157      1.1  jmcneill 					fsl,pinmux-ids = <
    158      1.1  jmcneill 						MX23_PAD_AUART1_RX__AUART1_RX
    159      1.1  jmcneill 						MX23_PAD_AUART1_TX__AUART1_TX
    160      1.1  jmcneill 						MX23_PAD_AUART1_CTS__AUART1_CTS
    161      1.1  jmcneill 						MX23_PAD_AUART1_RTS__AUART1_RTS
    162      1.1  jmcneill 					>;
    163      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_4mA>;
    164      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    165      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_DISABLE>;
    166      1.1  jmcneill 				};
    167      1.1  jmcneill 
    168      1.1  jmcneill 				auart0_2pins_a: auart0-2pins@0 {
    169      1.1  jmcneill 					reg = <0>;
    170      1.1  jmcneill 					fsl,pinmux-ids = <
    171      1.1  jmcneill 						MX23_PAD_I2C_SCL__AUART1_TX
    172      1.1  jmcneill 						MX23_PAD_I2C_SDA__AUART1_RX
    173      1.1  jmcneill 					>;
    174      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_4mA>;
    175      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    176      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_DISABLE>;
    177      1.1  jmcneill 				};
    178      1.1  jmcneill 
    179      1.1  jmcneill 				auart1_2pins_a: auart1-2pins@0 {
    180      1.1  jmcneill 					reg = <0>;
    181      1.1  jmcneill 					fsl,pinmux-ids = <
    182      1.1  jmcneill 						MX23_PAD_GPMI_D14__AUART2_RX
    183      1.1  jmcneill 						MX23_PAD_GPMI_D15__AUART2_TX
    184      1.1  jmcneill 					>;
    185      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_4mA>;
    186      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    187      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_DISABLE>;
    188      1.1  jmcneill 				};
    189      1.1  jmcneill 
    190      1.1  jmcneill 				gpmi_pins_a: gpmi-nand@0 {
    191      1.1  jmcneill 					reg = <0>;
    192      1.1  jmcneill 					fsl,pinmux-ids = <
    193      1.1  jmcneill 						MX23_PAD_GPMI_D00__GPMI_D00
    194      1.1  jmcneill 						MX23_PAD_GPMI_D01__GPMI_D01
    195      1.1  jmcneill 						MX23_PAD_GPMI_D02__GPMI_D02
    196      1.1  jmcneill 						MX23_PAD_GPMI_D03__GPMI_D03
    197      1.1  jmcneill 						MX23_PAD_GPMI_D04__GPMI_D04
    198      1.1  jmcneill 						MX23_PAD_GPMI_D05__GPMI_D05
    199      1.1  jmcneill 						MX23_PAD_GPMI_D06__GPMI_D06
    200      1.1  jmcneill 						MX23_PAD_GPMI_D07__GPMI_D07
    201      1.1  jmcneill 						MX23_PAD_GPMI_CLE__GPMI_CLE
    202      1.1  jmcneill 						MX23_PAD_GPMI_ALE__GPMI_ALE
    203      1.1  jmcneill 						MX23_PAD_GPMI_RDY0__GPMI_RDY0
    204      1.1  jmcneill 						MX23_PAD_GPMI_RDY1__GPMI_RDY1
    205      1.1  jmcneill 						MX23_PAD_GPMI_WPN__GPMI_WPN
    206      1.1  jmcneill 						MX23_PAD_GPMI_WRN__GPMI_WRN
    207      1.1  jmcneill 						MX23_PAD_GPMI_RDN__GPMI_RDN
    208      1.1  jmcneill 						MX23_PAD_GPMI_CE1N__GPMI_CE1N
    209      1.1  jmcneill 						MX23_PAD_GPMI_CE0N__GPMI_CE0N
    210      1.1  jmcneill 					>;
    211      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_4mA>;
    212      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    213      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_DISABLE>;
    214      1.1  jmcneill 				};
    215      1.1  jmcneill 
    216  1.1.1.2  jmcneill 				gpmi_pins_fixup: gpmi-pins-fixup@0 {
    217  1.1.1.2  jmcneill 					reg = <0>;
    218      1.1  jmcneill 					fsl,pinmux-ids = <
    219      1.1  jmcneill 						MX23_PAD_GPMI_WPN__GPMI_WPN
    220      1.1  jmcneill 						MX23_PAD_GPMI_WRN__GPMI_WRN
    221      1.1  jmcneill 						MX23_PAD_GPMI_RDN__GPMI_RDN
    222      1.1  jmcneill 					>;
    223      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_12mA>;
    224      1.1  jmcneill 				};
    225      1.1  jmcneill 
    226      1.1  jmcneill 				mmc0_4bit_pins_a: mmc0-4bit@0 {
    227      1.1  jmcneill 					reg = <0>;
    228      1.1  jmcneill 					fsl,pinmux-ids = <
    229      1.1  jmcneill 						MX23_PAD_SSP1_DATA0__SSP1_DATA0
    230      1.1  jmcneill 						MX23_PAD_SSP1_DATA1__SSP1_DATA1
    231      1.1  jmcneill 						MX23_PAD_SSP1_DATA2__SSP1_DATA2
    232      1.1  jmcneill 						MX23_PAD_SSP1_DATA3__SSP1_DATA3
    233      1.1  jmcneill 						MX23_PAD_SSP1_CMD__SSP1_CMD
    234      1.1  jmcneill 						MX23_PAD_SSP1_SCK__SSP1_SCK
    235      1.1  jmcneill 					>;
    236      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_8mA>;
    237      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    238      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_ENABLE>;
    239      1.1  jmcneill 				};
    240      1.1  jmcneill 
    241      1.1  jmcneill 				mmc0_8bit_pins_a: mmc0-8bit@0 {
    242      1.1  jmcneill 					reg = <0>;
    243      1.1  jmcneill 					fsl,pinmux-ids = <
    244      1.1  jmcneill 						MX23_PAD_SSP1_DATA0__SSP1_DATA0
    245      1.1  jmcneill 						MX23_PAD_SSP1_DATA1__SSP1_DATA1
    246      1.1  jmcneill 						MX23_PAD_SSP1_DATA2__SSP1_DATA2
    247      1.1  jmcneill 						MX23_PAD_SSP1_DATA3__SSP1_DATA3
    248      1.1  jmcneill 						MX23_PAD_GPMI_D08__SSP1_DATA4
    249      1.1  jmcneill 						MX23_PAD_GPMI_D09__SSP1_DATA5
    250      1.1  jmcneill 						MX23_PAD_GPMI_D10__SSP1_DATA6
    251      1.1  jmcneill 						MX23_PAD_GPMI_D11__SSP1_DATA7
    252      1.1  jmcneill 						MX23_PAD_SSP1_CMD__SSP1_CMD
    253      1.1  jmcneill 						MX23_PAD_SSP1_DETECT__SSP1_DETECT
    254      1.1  jmcneill 						MX23_PAD_SSP1_SCK__SSP1_SCK
    255      1.1  jmcneill 					>;
    256      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_8mA>;
    257      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    258      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_ENABLE>;
    259      1.1  jmcneill 				};
    260      1.1  jmcneill 
    261  1.1.1.2  jmcneill 				mmc0_pins_fixup: mmc0-pins-fixup@0 {
    262  1.1.1.2  jmcneill 					reg = <0>;
    263      1.1  jmcneill 					fsl,pinmux-ids = <
    264      1.1  jmcneill 						MX23_PAD_SSP1_DETECT__SSP1_DETECT
    265      1.1  jmcneill 						MX23_PAD_SSP1_SCK__SSP1_SCK
    266      1.1  jmcneill 					>;
    267      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_DISABLE>;
    268      1.1  jmcneill 				};
    269      1.1  jmcneill 
    270  1.1.1.6  jmcneill 				mmc0_sck_cfg: mmc0-sck-cfg@0 {
    271  1.1.1.6  jmcneill 					reg = <0>;
    272  1.1.1.6  jmcneill 					fsl,pinmux-ids = <
    273  1.1.1.6  jmcneill 						MX23_PAD_SSP1_SCK__SSP1_SCK
    274  1.1.1.6  jmcneill 					>;
    275  1.1.1.6  jmcneill 					fsl,pull-up = <MXS_PULL_DISABLE>;
    276  1.1.1.6  jmcneill 				};
    277  1.1.1.6  jmcneill 
    278      1.1  jmcneill 				mmc1_4bit_pins_a: mmc1-4bit@0 {
    279      1.1  jmcneill 					reg = <0>;
    280      1.1  jmcneill 					fsl,pinmux-ids = <
    281      1.1  jmcneill 						MX23_PAD_GPMI_D00__SSP2_DATA0
    282      1.1  jmcneill 						MX23_PAD_GPMI_D01__SSP2_DATA1
    283      1.1  jmcneill 						MX23_PAD_GPMI_D02__SSP2_DATA2
    284      1.1  jmcneill 						MX23_PAD_GPMI_D03__SSP2_DATA3
    285      1.1  jmcneill 						MX23_PAD_GPMI_RDY1__SSP2_CMD
    286      1.1  jmcneill 						MX23_PAD_GPMI_WRN__SSP2_SCK
    287      1.1  jmcneill 					>;
    288      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_8mA>;
    289      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    290      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_ENABLE>;
    291      1.1  jmcneill 				};
    292      1.1  jmcneill 
    293      1.1  jmcneill 				mmc1_8bit_pins_a: mmc1-8bit@0 {
    294      1.1  jmcneill 					reg = <0>;
    295      1.1  jmcneill 					fsl,pinmux-ids = <
    296      1.1  jmcneill 						MX23_PAD_GPMI_D00__SSP2_DATA0
    297      1.1  jmcneill 						MX23_PAD_GPMI_D01__SSP2_DATA1
    298      1.1  jmcneill 						MX23_PAD_GPMI_D02__SSP2_DATA2
    299      1.1  jmcneill 						MX23_PAD_GPMI_D03__SSP2_DATA3
    300      1.1  jmcneill 						MX23_PAD_GPMI_D04__SSP2_DATA4
    301      1.1  jmcneill 						MX23_PAD_GPMI_D05__SSP2_DATA5
    302      1.1  jmcneill 						MX23_PAD_GPMI_D06__SSP2_DATA6
    303      1.1  jmcneill 						MX23_PAD_GPMI_D07__SSP2_DATA7
    304      1.1  jmcneill 						MX23_PAD_GPMI_RDY1__SSP2_CMD
    305      1.1  jmcneill 						MX23_PAD_GPMI_WRN__SSP2_SCK
    306      1.1  jmcneill 					>;
    307      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_8mA>;
    308      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    309      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_ENABLE>;
    310      1.1  jmcneill 				};
    311      1.1  jmcneill 
    312      1.1  jmcneill 				pwm2_pins_a: pwm2@0 {
    313      1.1  jmcneill 					reg = <0>;
    314      1.1  jmcneill 					fsl,pinmux-ids = <
    315      1.1  jmcneill 						MX23_PAD_PWM2__PWM2
    316      1.1  jmcneill 					>;
    317      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_4mA>;
    318      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    319      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_DISABLE>;
    320      1.1  jmcneill 				};
    321      1.1  jmcneill 
    322      1.1  jmcneill 				lcdif_24bit_pins_a: lcdif-24bit@0 {
    323      1.1  jmcneill 					reg = <0>;
    324      1.1  jmcneill 					fsl,pinmux-ids = <
    325      1.1  jmcneill 						MX23_PAD_LCD_D00__LCD_D00
    326      1.1  jmcneill 						MX23_PAD_LCD_D01__LCD_D01
    327      1.1  jmcneill 						MX23_PAD_LCD_D02__LCD_D02
    328      1.1  jmcneill 						MX23_PAD_LCD_D03__LCD_D03
    329      1.1  jmcneill 						MX23_PAD_LCD_D04__LCD_D04
    330      1.1  jmcneill 						MX23_PAD_LCD_D05__LCD_D05
    331      1.1  jmcneill 						MX23_PAD_LCD_D06__LCD_D06
    332      1.1  jmcneill 						MX23_PAD_LCD_D07__LCD_D07
    333      1.1  jmcneill 						MX23_PAD_LCD_D08__LCD_D08
    334      1.1  jmcneill 						MX23_PAD_LCD_D09__LCD_D09
    335      1.1  jmcneill 						MX23_PAD_LCD_D10__LCD_D10
    336      1.1  jmcneill 						MX23_PAD_LCD_D11__LCD_D11
    337      1.1  jmcneill 						MX23_PAD_LCD_D12__LCD_D12
    338      1.1  jmcneill 						MX23_PAD_LCD_D13__LCD_D13
    339      1.1  jmcneill 						MX23_PAD_LCD_D14__LCD_D14
    340      1.1  jmcneill 						MX23_PAD_LCD_D15__LCD_D15
    341      1.1  jmcneill 						MX23_PAD_LCD_D16__LCD_D16
    342      1.1  jmcneill 						MX23_PAD_LCD_D17__LCD_D17
    343      1.1  jmcneill 						MX23_PAD_GPMI_D08__LCD_D18
    344      1.1  jmcneill 						MX23_PAD_GPMI_D09__LCD_D19
    345      1.1  jmcneill 						MX23_PAD_GPMI_D10__LCD_D20
    346      1.1  jmcneill 						MX23_PAD_GPMI_D11__LCD_D21
    347      1.1  jmcneill 						MX23_PAD_GPMI_D12__LCD_D22
    348      1.1  jmcneill 						MX23_PAD_GPMI_D13__LCD_D23
    349      1.1  jmcneill 						MX23_PAD_LCD_DOTCK__LCD_DOTCK
    350      1.1  jmcneill 						MX23_PAD_LCD_ENABLE__LCD_ENABLE
    351      1.1  jmcneill 						MX23_PAD_LCD_HSYNC__LCD_HSYNC
    352      1.1  jmcneill 						MX23_PAD_LCD_VSYNC__LCD_VSYNC
    353      1.1  jmcneill 					>;
    354      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_4mA>;
    355      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    356      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_DISABLE>;
    357      1.1  jmcneill 				};
    358      1.1  jmcneill 
    359      1.1  jmcneill 				spi2_pins_a: spi2@0 {
    360      1.1  jmcneill 					reg = <0>;
    361      1.1  jmcneill 					fsl,pinmux-ids = <
    362      1.1  jmcneill 						MX23_PAD_GPMI_WRN__SSP2_SCK
    363      1.1  jmcneill 						MX23_PAD_GPMI_RDY1__SSP2_CMD
    364      1.1  jmcneill 						MX23_PAD_GPMI_D00__SSP2_DATA0
    365      1.1  jmcneill 						MX23_PAD_GPMI_D03__SSP2_DATA3
    366      1.1  jmcneill 					>;
    367      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_8mA>;
    368      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    369      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_ENABLE>;
    370      1.1  jmcneill 				};
    371      1.1  jmcneill 
    372      1.1  jmcneill 				i2c_pins_a: i2c@0 {
    373      1.1  jmcneill 					reg = <0>;
    374      1.1  jmcneill 					fsl,pinmux-ids = <
    375      1.1  jmcneill 						MX23_PAD_I2C_SCL__I2C_SCL
    376      1.1  jmcneill 						MX23_PAD_I2C_SDA__I2C_SDA
    377      1.1  jmcneill 					>;
    378      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_8mA>;
    379      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    380      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_ENABLE>;
    381      1.1  jmcneill 				};
    382      1.1  jmcneill 
    383      1.1  jmcneill 				i2c_pins_b: i2c@1 {
    384      1.1  jmcneill 					reg = <1>;
    385      1.1  jmcneill 					fsl,pinmux-ids = <
    386      1.1  jmcneill 						MX23_PAD_LCD_ENABLE__I2C_SCL
    387      1.1  jmcneill 						MX23_PAD_LCD_HSYNC__I2C_SDA
    388      1.1  jmcneill 					>;
    389      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_8mA>;
    390      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    391      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_ENABLE>;
    392      1.1  jmcneill 				};
    393      1.1  jmcneill 
    394      1.1  jmcneill 				i2c_pins_c: i2c@2 {
    395      1.1  jmcneill 					reg = <2>;
    396      1.1  jmcneill 					fsl,pinmux-ids = <
    397      1.1  jmcneill 						MX23_PAD_SSP1_DATA1__I2C_SCL
    398      1.1  jmcneill 						MX23_PAD_SSP1_DATA2__I2C_SDA
    399      1.1  jmcneill 					>;
    400      1.1  jmcneill 					fsl,drive-strength = <MXS_DRIVE_8mA>;
    401      1.1  jmcneill 					fsl,voltage = <MXS_VOLTAGE_HIGH>;
    402      1.1  jmcneill 					fsl,pull-up = <MXS_PULL_ENABLE>;
    403      1.1  jmcneill 				};
    404      1.1  jmcneill 			};
    405      1.1  jmcneill 
    406      1.1  jmcneill 			digctl@8001c000 {
    407      1.1  jmcneill 				compatible = "fsl,imx23-digctl";
    408      1.1  jmcneill 				reg = <0x8001c000 2000>;
    409      1.1  jmcneill 				status = "disabled";
    410      1.1  jmcneill 			};
    411      1.1  jmcneill 
    412      1.1  jmcneill 			emi@80020000 {
    413      1.1  jmcneill 				reg = <0x80020000 0x2000>;
    414      1.1  jmcneill 				status = "disabled";
    415      1.1  jmcneill 			};
    416      1.1  jmcneill 
    417      1.1  jmcneill 			dma_apbx: dma-apbx@80024000 {
    418      1.1  jmcneill 				compatible = "fsl,imx23-dma-apbx";
    419      1.1  jmcneill 				reg = <0x80024000 0x2000>;
    420      1.1  jmcneill 				interrupts = <7 5 9 26
    421      1.1  jmcneill 					      19 0 25 23
    422      1.1  jmcneill 					      60 58 9 0
    423      1.1  jmcneill 					      0 0 0 0>;
    424      1.1  jmcneill 				interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
    425      1.1  jmcneill 						  "saif0", "empty", "auart0-rx", "auart0-tx",
    426      1.1  jmcneill 						  "auart1-rx", "auart1-tx", "saif1", "empty",
    427      1.1  jmcneill 						  "empty", "empty", "empty", "empty";
    428      1.1  jmcneill 				#dma-cells = <1>;
    429      1.1  jmcneill 				dma-channels = <16>;
    430      1.1  jmcneill 				clocks = <&clks 16>;
    431      1.1  jmcneill 			};
    432      1.1  jmcneill 
    433  1.1.1.6  jmcneill 			dcp: crypto@80028000 {
    434      1.1  jmcneill 				compatible = "fsl,imx23-dcp";
    435      1.1  jmcneill 				reg = <0x80028000 0x2000>;
    436      1.1  jmcneill 				interrupts = <53 54>;
    437      1.1  jmcneill 				status = "okay";
    438      1.1  jmcneill 			};
    439      1.1  jmcneill 
    440      1.1  jmcneill 			pxp@8002a000 {
    441      1.1  jmcneill 				reg = <0x8002a000 0x2000>;
    442      1.1  jmcneill 				status = "disabled";
    443      1.1  jmcneill 			};
    444      1.1  jmcneill 
    445  1.1.1.6  jmcneill 			efuse@8002c000 {
    446      1.1  jmcneill 				compatible = "fsl,imx23-ocotp", "fsl,ocotp";
    447      1.1  jmcneill 				#address-cells = <1>;
    448      1.1  jmcneill 				#size-cells = <1>;
    449      1.1  jmcneill 				reg = <0x8002c000 0x2000>;
    450      1.1  jmcneill 				clocks = <&clks 15>;
    451      1.1  jmcneill 			};
    452      1.1  jmcneill 
    453      1.1  jmcneill 			axi-ahb@8002e000 {
    454      1.1  jmcneill 				reg = <0x8002e000 0x2000>;
    455      1.1  jmcneill 				status = "disabled";
    456      1.1  jmcneill 			};
    457      1.1  jmcneill 
    458      1.1  jmcneill 			lcdif@80030000 {
    459      1.1  jmcneill 				compatible = "fsl,imx23-lcdif";
    460      1.1  jmcneill 				reg = <0x80030000 2000>;
    461      1.1  jmcneill 				interrupts = <46 45>;
    462      1.1  jmcneill 				clocks = <&clks 38>;
    463      1.1  jmcneill 				status = "disabled";
    464      1.1  jmcneill 			};
    465      1.1  jmcneill 
    466  1.1.1.4  jmcneill 			ssp1: spi@80034000 {
    467      1.1  jmcneill 				reg = <0x80034000 0x2000>;
    468      1.1  jmcneill 				interrupts = <2>;
    469      1.1  jmcneill 				clocks = <&clks 33>;
    470      1.1  jmcneill 				dmas = <&dma_apbh 2>;
    471      1.1  jmcneill 				dma-names = "rx-tx";
    472      1.1  jmcneill 				status = "disabled";
    473      1.1  jmcneill 			};
    474      1.1  jmcneill 
    475      1.1  jmcneill 			tvenc@80038000 {
    476      1.1  jmcneill 				reg = <0x80038000 0x2000>;
    477      1.1  jmcneill 				status = "disabled";
    478      1.1  jmcneill 			};
    479      1.1  jmcneill 		};
    480      1.1  jmcneill 
    481      1.1  jmcneill 		apbx@80040000 {
    482      1.1  jmcneill 			compatible = "simple-bus";
    483      1.1  jmcneill 			#address-cells = <1>;
    484      1.1  jmcneill 			#size-cells = <1>;
    485      1.1  jmcneill 			reg = <0x80040000 0x40000>;
    486      1.1  jmcneill 			ranges;
    487      1.1  jmcneill 
    488      1.1  jmcneill 			clks: clkctrl@80040000 {
    489      1.1  jmcneill 				compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
    490      1.1  jmcneill 				reg = <0x80040000 0x2000>;
    491      1.1  jmcneill 				#clock-cells = <1>;
    492      1.1  jmcneill 			};
    493      1.1  jmcneill 
    494      1.1  jmcneill 			saif0: saif@80042000 {
    495      1.1  jmcneill 				reg = <0x80042000 0x2000>;
    496      1.1  jmcneill 				dmas = <&dma_apbx 4>;
    497      1.1  jmcneill 				dma-names = "rx-tx";
    498      1.1  jmcneill 				status = "disabled";
    499      1.1  jmcneill 			};
    500      1.1  jmcneill 
    501      1.1  jmcneill 			power@80044000 {
    502      1.1  jmcneill 				reg = <0x80044000 0x2000>;
    503      1.1  jmcneill 				status = "disabled";
    504      1.1  jmcneill 			};
    505      1.1  jmcneill 
    506      1.1  jmcneill 			saif1: saif@80046000 {
    507      1.1  jmcneill 				reg = <0x80046000 0x2000>;
    508      1.1  jmcneill 				dmas = <&dma_apbx 10>;
    509      1.1  jmcneill 				dma-names = "rx-tx";
    510      1.1  jmcneill 				status = "disabled";
    511      1.1  jmcneill 			};
    512      1.1  jmcneill 
    513      1.1  jmcneill 			audio-out@80048000 {
    514      1.1  jmcneill 				reg = <0x80048000 0x2000>;
    515      1.1  jmcneill 				dmas = <&dma_apbx 1>;
    516      1.1  jmcneill 				dma-names = "tx";
    517      1.1  jmcneill 				status = "disabled";
    518      1.1  jmcneill 			};
    519      1.1  jmcneill 
    520      1.1  jmcneill 			audio-in@8004c000 {
    521      1.1  jmcneill 				reg = <0x8004c000 0x2000>;
    522      1.1  jmcneill 				dmas = <&dma_apbx 0>;
    523      1.1  jmcneill 				dma-names = "rx";
    524      1.1  jmcneill 				status = "disabled";
    525      1.1  jmcneill 			};
    526      1.1  jmcneill 
    527      1.1  jmcneill 			lradc: lradc@80050000 {
    528      1.1  jmcneill 				compatible = "fsl,imx23-lradc";
    529      1.1  jmcneill 				reg = <0x80050000 0x2000>;
    530      1.1  jmcneill 				interrupts = <36 37 38 39 40 41 42 43 44>;
    531      1.1  jmcneill 				status = "disabled";
    532      1.1  jmcneill 				clocks = <&clks 26>;
    533      1.1  jmcneill 				#io-channel-cells = <1>;
    534      1.1  jmcneill 			};
    535      1.1  jmcneill 
    536      1.1  jmcneill 			spdif@80054000 {
    537      1.1  jmcneill 				reg = <0x80054000 2000>;
    538      1.1  jmcneill 				dmas = <&dma_apbx 2>;
    539      1.1  jmcneill 				dma-names = "tx";
    540      1.1  jmcneill 				status = "disabled";
    541      1.1  jmcneill 			};
    542      1.1  jmcneill 
    543      1.1  jmcneill 			i2c: i2c@80058000 {
    544      1.1  jmcneill 				#address-cells = <1>;
    545      1.1  jmcneill 				#size-cells = <0>;
    546      1.1  jmcneill 				compatible = "fsl,imx23-i2c";
    547      1.1  jmcneill 				reg = <0x80058000 0x2000>;
    548      1.1  jmcneill 				interrupts = <27>;
    549      1.1  jmcneill 				clock-frequency = <100000>;
    550      1.1  jmcneill 				dmas = <&dma_apbx 3>;
    551      1.1  jmcneill 				dma-names = "rx-tx";
    552      1.1  jmcneill 				status = "disabled";
    553      1.1  jmcneill 			};
    554      1.1  jmcneill 
    555      1.1  jmcneill 			rtc@8005c000 {
    556      1.1  jmcneill 				compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
    557      1.1  jmcneill 				reg = <0x8005c000 0x2000>;
    558      1.1  jmcneill 				interrupts = <22>;
    559      1.1  jmcneill 			};
    560      1.1  jmcneill 
    561      1.1  jmcneill 			pwm: pwm@80064000 {
    562      1.1  jmcneill 				compatible = "fsl,imx23-pwm";
    563      1.1  jmcneill 				reg = <0x80064000 0x2000>;
    564      1.1  jmcneill 				clocks = <&clks 30>;
    565      1.1  jmcneill 				#pwm-cells = <2>;
    566      1.1  jmcneill 				fsl,pwm-number = <5>;
    567      1.1  jmcneill 				status = "disabled";
    568      1.1  jmcneill 			};
    569      1.1  jmcneill 
    570      1.1  jmcneill 			timrot@80068000 {
    571      1.1  jmcneill 				compatible = "fsl,imx23-timrot", "fsl,timrot";
    572      1.1  jmcneill 				reg = <0x80068000 0x2000>;
    573      1.1  jmcneill 				interrupts = <28 29 30 31>;
    574      1.1  jmcneill 				clocks = <&clks 28>;
    575      1.1  jmcneill 			};
    576      1.1  jmcneill 
    577      1.1  jmcneill 			auart0: serial@8006c000 {
    578      1.1  jmcneill 				compatible = "fsl,imx23-auart";
    579      1.1  jmcneill 				reg = <0x8006c000 0x2000>;
    580      1.1  jmcneill 				interrupts = <24>;
    581      1.1  jmcneill 				clocks = <&clks 32>;
    582      1.1  jmcneill 				dmas = <&dma_apbx 6>, <&dma_apbx 7>;
    583      1.1  jmcneill 				dma-names = "rx", "tx";
    584      1.1  jmcneill 				status = "disabled";
    585      1.1  jmcneill 			};
    586      1.1  jmcneill 
    587      1.1  jmcneill 			auart1: serial@8006e000 {
    588      1.1  jmcneill 				compatible = "fsl,imx23-auart";
    589      1.1  jmcneill 				reg = <0x8006e000 0x2000>;
    590      1.1  jmcneill 				interrupts = <59>;
    591      1.1  jmcneill 				clocks = <&clks 32>;
    592      1.1  jmcneill 				dmas = <&dma_apbx 8>, <&dma_apbx 9>;
    593      1.1  jmcneill 				dma-names = "rx", "tx";
    594      1.1  jmcneill 				status = "disabled";
    595      1.1  jmcneill 			};
    596      1.1  jmcneill 
    597      1.1  jmcneill 			duart: serial@80070000 {
    598      1.1  jmcneill 				compatible = "arm,pl011", "arm,primecell";
    599      1.1  jmcneill 				reg = <0x80070000 0x2000>;
    600      1.1  jmcneill 				interrupts = <0>;
    601      1.1  jmcneill 				clocks = <&clks 32>, <&clks 16>;
    602      1.1  jmcneill 				clock-names = "uart", "apb_pclk";
    603      1.1  jmcneill 				status = "disabled";
    604      1.1  jmcneill 			};
    605      1.1  jmcneill 
    606      1.1  jmcneill 			usbphy0: usbphy@8007c000 {
    607      1.1  jmcneill 				compatible = "fsl,imx23-usbphy";
    608      1.1  jmcneill 				reg = <0x8007c000 0x2000>;
    609      1.1  jmcneill 				clocks = <&clks 41>;
    610      1.1  jmcneill 				status = "disabled";
    611      1.1  jmcneill 			};
    612      1.1  jmcneill 		};
    613      1.1  jmcneill 	};
    614      1.1  jmcneill 
    615      1.1  jmcneill 	ahb@80080000 {
    616      1.1  jmcneill 		compatible = "simple-bus";
    617      1.1  jmcneill 		#address-cells = <1>;
    618      1.1  jmcneill 		#size-cells = <1>;
    619      1.1  jmcneill 		reg = <0x80080000 0x80000>;
    620      1.1  jmcneill 		ranges;
    621      1.1  jmcneill 
    622      1.1  jmcneill 		usb0: usb@80080000 {
    623      1.1  jmcneill 			compatible = "fsl,imx23-usb", "fsl,imx27-usb";
    624      1.1  jmcneill 			reg = <0x80080000 0x40000>;
    625      1.1  jmcneill 			interrupts = <11>;
    626      1.1  jmcneill 			fsl,usbphy = <&usbphy0>;
    627      1.1  jmcneill 			clocks = <&clks 40>;
    628      1.1  jmcneill 			status = "disabled";
    629      1.1  jmcneill 		};
    630      1.1  jmcneill 	};
    631      1.1  jmcneill 
    632      1.1  jmcneill 	iio-hwmon {
    633      1.1  jmcneill 		compatible = "iio-hwmon";
    634      1.1  jmcneill 		io-channels = <&lradc 8>;
    635      1.1  jmcneill 	};
    636      1.1  jmcneill };
    637