1 1.1.1.5 skrll // SPDX-License-Identifier: GPL-2.0-or-later 2 1.1 jmcneill /* 3 1.1 jmcneill * Copyright 2013 Eukra Electromatique <denis (a] eukrea.com> 4 1.1 jmcneill */ 5 1.1 jmcneill 6 1.1 jmcneill /dts-v1/; 7 1.1 jmcneill 8 1.1 jmcneill #include <dt-bindings/gpio/gpio.h> 9 1.1 jmcneill #include <dt-bindings/input/input.h> 10 1.1 jmcneill #include "imx25-eukrea-cpuimx25.dtsi" 11 1.1 jmcneill 12 1.1 jmcneill / { 13 1.1 jmcneill model = "Eukrea MBIMXSD25"; 14 1.1 jmcneill compatible = "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25"; 15 1.1 jmcneill 16 1.1 jmcneill gpio_keys { 17 1.1 jmcneill compatible = "gpio-keys"; 18 1.1 jmcneill pinctrl-names = "default"; 19 1.1 jmcneill pinctrl-0 = <&pinctrl_gpiokeys>; 20 1.1 jmcneill 21 1.1 jmcneill bp1 { 22 1.1 jmcneill label = "BP1"; 23 1.1 jmcneill gpios = <&gpio3 18 GPIO_ACTIVE_LOW>; 24 1.1 jmcneill linux,code = <BTN_MISC>; 25 1.1 jmcneill wakeup-source; 26 1.1 jmcneill }; 27 1.1 jmcneill }; 28 1.1 jmcneill 29 1.1 jmcneill leds { 30 1.1 jmcneill compatible = "gpio-leds"; 31 1.1 jmcneill pinctrl-names = "default"; 32 1.1 jmcneill pinctrl-0 = <&pinctrl_gpioled>; 33 1.1 jmcneill 34 1.1 jmcneill led1 { 35 1.1 jmcneill label = "led1"; 36 1.1 jmcneill gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 37 1.1 jmcneill linux,default-trigger = "heartbeat"; 38 1.1 jmcneill }; 39 1.1 jmcneill }; 40 1.1 jmcneill 41 1.1 jmcneill sound { 42 1.1 jmcneill compatible = "eukrea,asoc-tlv320"; 43 1.1 jmcneill eukrea,model = "imx25-eukrea-tlv320aic23"; 44 1.1 jmcneill ssi-controller = <&ssi1>; 45 1.1 jmcneill fsl,mux-int-port = <1>; 46 1.1 jmcneill fsl,mux-ext-port = <5>; 47 1.1 jmcneill }; 48 1.1 jmcneill }; 49 1.1 jmcneill 50 1.1 jmcneill &audmux { 51 1.1 jmcneill pinctrl-names = "default"; 52 1.1 jmcneill pinctrl-0 = <&pinctrl_audmux>; 53 1.1 jmcneill status = "okay"; 54 1.1 jmcneill }; 55 1.1 jmcneill 56 1.1 jmcneill &esdhc1 { 57 1.1 jmcneill pinctrl-names = "default"; 58 1.1 jmcneill pinctrl-0 = <&pinctrl_esdhc1>; 59 1.1.1.3 jmcneill cd-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; 60 1.1 jmcneill status = "okay"; 61 1.1 jmcneill }; 62 1.1 jmcneill 63 1.1 jmcneill &i2c1 { 64 1.1 jmcneill tlv320aic23: codec@1a { 65 1.1 jmcneill compatible = "ti,tlv320aic23"; 66 1.1 jmcneill reg = <0x1a>; 67 1.1 jmcneill }; 68 1.1 jmcneill }; 69 1.1 jmcneill 70 1.1 jmcneill &iomuxc { 71 1.1 jmcneill imx25-eukrea-mbimxsd25-baseboard { 72 1.1 jmcneill pinctrl_audmux: audmuxgrp { 73 1.1 jmcneill fsl,pins = < 74 1.1 jmcneill MX25_PAD_KPP_COL3__AUD5_TXFS 0xe0 75 1.1 jmcneill MX25_PAD_KPP_COL2__AUD5_TXC 0xe0 76 1.1 jmcneill MX25_PAD_KPP_COL1__AUD5_RXD 0xe0 77 1.1 jmcneill MX25_PAD_KPP_COL0__AUD5_TXD 0xe0 78 1.1 jmcneill >; 79 1.1 jmcneill }; 80 1.1 jmcneill 81 1.1 jmcneill pinctrl_esdhc1: esdhc1grp { 82 1.1 jmcneill fsl,pins = < 83 1.1.1.4 jmcneill MX25_PAD_SD1_CMD__ESDHC1_CMD 0x400000c0 84 1.1.1.4 jmcneill MX25_PAD_SD1_CLK__ESDHC1_CLK 0x400000c0 85 1.1.1.4 jmcneill MX25_PAD_SD1_DATA0__ESDHC1_DAT0 0x400000c0 86 1.1.1.4 jmcneill MX25_PAD_SD1_DATA1__ESDHC1_DAT1 0x400000c0 87 1.1.1.4 jmcneill MX25_PAD_SD1_DATA2__ESDHC1_DAT2 0x400000c0 88 1.1.1.4 jmcneill MX25_PAD_SD1_DATA3__ESDHC1_DAT3 0x400000c0 89 1.1 jmcneill >; 90 1.1 jmcneill }; 91 1.1 jmcneill 92 1.1 jmcneill pinctrl_gpiokeys: gpiokeysgrp { 93 1.1 jmcneill fsl,pins = <MX25_PAD_VSTBY_ACK__GPIO_3_18 0x80000000>; 94 1.1 jmcneill }; 95 1.1 jmcneill 96 1.1 jmcneill pinctrl_gpioled: gpioledgrp { 97 1.1 jmcneill fsl,pins = <MX25_PAD_POWER_FAIL__GPIO_3_19 0x80000000>; 98 1.1 jmcneill }; 99 1.1 jmcneill 100 1.1 jmcneill pinctrl_lcdc: lcdcgrp { 101 1.1 jmcneill fsl,pins = < 102 1.1 jmcneill MX25_PAD_LD0__LD0 0x1 103 1.1 jmcneill MX25_PAD_LD1__LD1 0x1 104 1.1 jmcneill MX25_PAD_LD2__LD2 0x1 105 1.1 jmcneill MX25_PAD_LD3__LD3 0x1 106 1.1 jmcneill MX25_PAD_LD4__LD4 0x1 107 1.1 jmcneill MX25_PAD_LD5__LD5 0x1 108 1.1 jmcneill MX25_PAD_LD6__LD6 0x1 109 1.1 jmcneill MX25_PAD_LD7__LD7 0x1 110 1.1 jmcneill MX25_PAD_LD8__LD8 0x1 111 1.1 jmcneill MX25_PAD_LD9__LD9 0x1 112 1.1 jmcneill MX25_PAD_LD10__LD10 0x1 113 1.1 jmcneill MX25_PAD_LD11__LD11 0x1 114 1.1 jmcneill MX25_PAD_LD12__LD12 0x1 115 1.1 jmcneill MX25_PAD_LD13__LD13 0x1 116 1.1 jmcneill MX25_PAD_LD14__LD14 0x1 117 1.1 jmcneill MX25_PAD_LD15__LD15 0x1 118 1.1 jmcneill MX25_PAD_GPIO_E__LD16 0x1 119 1.1 jmcneill MX25_PAD_GPIO_F__LD17 0x1 120 1.1 jmcneill MX25_PAD_HSYNC__HSYNC 0x80000000 121 1.1 jmcneill MX25_PAD_VSYNC__VSYNC 0x80000000 122 1.1 jmcneill MX25_PAD_LSCLK__LSCLK 0x80000000 123 1.1 jmcneill MX25_PAD_OE_ACD__OE_ACD 0x80000000 124 1.1 jmcneill MX25_PAD_CONTRAST__CONTRAST 0x80000000 125 1.1 jmcneill >; 126 1.1 jmcneill }; 127 1.1 jmcneill 128 1.1 jmcneill pinctrl_uart1: uart1grp { 129 1.1 jmcneill fsl,pins = < 130 1.1 jmcneill MX25_PAD_UART1_RTS__UART1_RTS 0xe0 131 1.1 jmcneill MX25_PAD_UART1_CTS__UART1_CTS 0xe0 132 1.1 jmcneill MX25_PAD_UART1_TXD__UART1_TXD 0x80000000 133 1.1 jmcneill MX25_PAD_UART1_RXD__UART1_RXD 0xc0 134 1.1 jmcneill >; 135 1.1 jmcneill }; 136 1.1 jmcneill 137 1.1 jmcneill pinctrl_uart2: uart2grp { 138 1.1 jmcneill fsl,pins = < 139 1.1 jmcneill MX25_PAD_UART2_RXD__UART2_RXD 0x80000000 140 1.1 jmcneill MX25_PAD_UART2_TXD__UART2_TXD 0x80000000 141 1.1 jmcneill MX25_PAD_UART2_RTS__UART2_RTS 0x80000000 142 1.1 jmcneill MX25_PAD_UART2_CTS__UART2_CTS 0x80000000 143 1.1 jmcneill >; 144 1.1 jmcneill }; 145 1.1 jmcneill }; 146 1.1 jmcneill }; 147 1.1 jmcneill 148 1.1 jmcneill &ssi1 { 149 1.1 jmcneill codec-handle = <&tlv320aic23>; 150 1.1 jmcneill status = "okay"; 151 1.1 jmcneill }; 152 1.1 jmcneill 153 1.1 jmcneill &uart1 { 154 1.1 jmcneill pinctrl-names = "default"; 155 1.1 jmcneill pinctrl-0 = <&pinctrl_uart1>; 156 1.1 jmcneill uart-has-rtscts; 157 1.1 jmcneill status = "okay"; 158 1.1 jmcneill }; 159 1.1 jmcneill 160 1.1 jmcneill &uart2 { 161 1.1 jmcneill pinctrl-names = "default"; 162 1.1 jmcneill pinctrl-0 = <&pinctrl_uart2>; 163 1.1 jmcneill uart-has-rtscts; 164 1.1 jmcneill status = "okay"; 165 1.1 jmcneill }; 166 1.1 jmcneill 167 1.1 jmcneill &usbhost1 { 168 1.1 jmcneill status = "okay"; 169 1.1 jmcneill }; 170 1.1 jmcneill 171 1.1 jmcneill &usbotg { 172 1.1 jmcneill external-vbus-divider; 173 1.1 jmcneill status = "okay"; 174 1.1 jmcneill }; 175