1 1.1.1.3 skrll // SPDX-License-Identifier: GPL-2.0-or-later 2 1.1 jmcneill /* 3 1.1 jmcneill * Copyright 2013 Eukra Electromatique <denis (a] eukrea.com> 4 1.1 jmcneill */ 5 1.1 jmcneill 6 1.1 jmcneill /dts-v1/; 7 1.1 jmcneill 8 1.1 jmcneill #include <dt-bindings/gpio/gpio.h> 9 1.1 jmcneill #include <dt-bindings/input/input.h> 10 1.1 jmcneill #include "imx35-eukrea-cpuimx35.dtsi" 11 1.1 jmcneill 12 1.1 jmcneill / { 13 1.1 jmcneill model = "Eukrea CPUIMX35"; 14 1.1 jmcneill compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35"; 15 1.1 jmcneill 16 1.1 jmcneill gpio_keys { 17 1.1 jmcneill compatible = "gpio-keys"; 18 1.1 jmcneill pinctrl-names = "default"; 19 1.1 jmcneill pinctrl-0 = <&pinctrl_bp1>; 20 1.1 jmcneill 21 1.1 jmcneill bp1 { 22 1.1 jmcneill label = "BP1"; 23 1.1 jmcneill gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 24 1.1 jmcneill linux,code = <BTN_MISC>; 25 1.1 jmcneill wakeup-source; 26 1.1 jmcneill linux,input-type = <1>; 27 1.1 jmcneill }; 28 1.1 jmcneill }; 29 1.1 jmcneill 30 1.1 jmcneill leds { 31 1.1 jmcneill compatible = "gpio-leds"; 32 1.1 jmcneill pinctrl-names = "default"; 33 1.1 jmcneill pinctrl-0 = <&pinctrl_led1>; 34 1.1 jmcneill 35 1.1 jmcneill led1 { 36 1.1 jmcneill label = "led1"; 37 1.1 jmcneill gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; 38 1.1 jmcneill linux,default-trigger = "heartbeat"; 39 1.1 jmcneill }; 40 1.1 jmcneill }; 41 1.1 jmcneill 42 1.1 jmcneill sound { 43 1.1 jmcneill compatible = "eukrea,asoc-tlv320"; 44 1.1 jmcneill eukrea,model = "imx35-eukrea-tlv320aic23"; 45 1.1 jmcneill ssi-controller = <&ssi1>; 46 1.1 jmcneill fsl,mux-int-port = <1>; 47 1.1 jmcneill fsl,mux-ext-port = <4>; 48 1.1 jmcneill }; 49 1.1 jmcneill }; 50 1.1 jmcneill 51 1.1 jmcneill &audmux { 52 1.1 jmcneill pinctrl-names = "default"; 53 1.1 jmcneill pinctrl-0 = <&pinctrl_audmux>; 54 1.1 jmcneill status = "okay"; 55 1.1 jmcneill }; 56 1.1 jmcneill 57 1.1 jmcneill &esdhc1 { 58 1.1 jmcneill pinctrl-names = "default"; 59 1.1 jmcneill pinctrl-0 = <&pinctrl_esdhc1>; 60 1.1.1.2 jmcneill cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; 61 1.1 jmcneill status = "okay"; 62 1.1 jmcneill }; 63 1.1 jmcneill 64 1.1 jmcneill &i2c1 { 65 1.1 jmcneill tlv320aic23: codec@1a { 66 1.1 jmcneill compatible = "ti,tlv320aic23"; 67 1.1 jmcneill reg = <0x1a>; 68 1.1 jmcneill }; 69 1.1 jmcneill }; 70 1.1 jmcneill 71 1.1 jmcneill &iomuxc { 72 1.1 jmcneill imx35-eukrea { 73 1.1 jmcneill pinctrl_audmux: audmuxgrp { 74 1.1 jmcneill fsl,pins = < 75 1.1 jmcneill MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS 0x80000000 76 1.1 jmcneill MX35_PAD_STXD4__AUDMUX_AUD4_TXD 0x80000000 77 1.1 jmcneill MX35_PAD_SRXD4__AUDMUX_AUD4_RXD 0x80000000 78 1.1 jmcneill MX35_PAD_SCK4__AUDMUX_AUD4_TXC 0x80000000 79 1.1 jmcneill >; 80 1.1 jmcneill }; 81 1.1 jmcneill 82 1.1 jmcneill pinctrl_bp1: bp1grp { 83 1.1 jmcneill fsl,pins = <MX35_PAD_LD19__GPIO3_25 0x80000000>; 84 1.1 jmcneill }; 85 1.1 jmcneill 86 1.1 jmcneill pinctrl_esdhc1: esdhc1grp { 87 1.1 jmcneill fsl,pins = < 88 1.1 jmcneill MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000 89 1.1 jmcneill MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000 90 1.1 jmcneill MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000 91 1.1 jmcneill MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000 92 1.1 jmcneill MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000 93 1.1 jmcneill MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000 94 1.1 jmcneill MX35_PAD_LD18__GPIO3_24 0x80000000 /* CD */ 95 1.1 jmcneill >; 96 1.1 jmcneill }; 97 1.1 jmcneill 98 1.1 jmcneill pinctrl_led1: led1grp { 99 1.1 jmcneill fsl,pins = <MX35_PAD_LD23__GPIO3_29 0x80000000>; 100 1.1 jmcneill }; 101 1.1 jmcneill 102 1.1 jmcneill pinctrl_reg_lcd_3v3: reg-lcd-3v3 { 103 1.1 jmcneill fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>; 104 1.1 jmcneill }; 105 1.1 jmcneill 106 1.1 jmcneill pinctrl_uart1: uart1grp { 107 1.1 jmcneill fsl,pins = < 108 1.1 jmcneill MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5 109 1.1 jmcneill MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5 110 1.1 jmcneill MX35_PAD_CTS1__UART1_CTS 0x1c5 111 1.1 jmcneill MX35_PAD_RTS1__UART1_RTS 0x1c5 112 1.1 jmcneill >; 113 1.1 jmcneill }; 114 1.1 jmcneill 115 1.1 jmcneill pinctrl_uart2: uart2grp { 116 1.1 jmcneill fsl,pins = < 117 1.1 jmcneill MX35_PAD_RXD2__UART2_RXD_MUX 0x1c5 118 1.1 jmcneill MX35_PAD_TXD2__UART2_TXD_MUX 0x1c5 119 1.1 jmcneill MX35_PAD_RTS2__UART2_RTS 0x1c5 120 1.1 jmcneill MX35_PAD_CTS2__UART2_CTS 0x1c5 121 1.1 jmcneill >; 122 1.1 jmcneill }; 123 1.1 jmcneill }; 124 1.1 jmcneill }; 125 1.1 jmcneill 126 1.1 jmcneill &ssi1 { 127 1.1 jmcneill codec-handle = <&tlv320aic23>; 128 1.1 jmcneill status = "okay"; 129 1.1 jmcneill }; 130 1.1 jmcneill 131 1.1 jmcneill &uart1 { 132 1.1 jmcneill pinctrl-names = "default"; 133 1.1 jmcneill pinctrl-0 = <&pinctrl_uart1>; 134 1.1 jmcneill uart-has-rtscts; 135 1.1 jmcneill status = "okay"; 136 1.1 jmcneill }; 137 1.1 jmcneill 138 1.1 jmcneill &uart2 { 139 1.1 jmcneill pinctrl-names = "default"; 140 1.1 jmcneill pinctrl-0 = <&pinctrl_uart2>; 141 1.1 jmcneill uart-has-rtscts; 142 1.1 jmcneill status = "okay"; 143 1.1 jmcneill }; 144 1.1 jmcneill 145 1.1 jmcneill &usbhost1 { 146 1.1 jmcneill phy_type = "serial"; 147 1.1 jmcneill dr_mode = "host"; 148 1.1 jmcneill status = "okay"; 149 1.1 jmcneill }; 150 1.1 jmcneill 151 1.1 jmcneill &usbotg { 152 1.1 jmcneill phy_type = "utmi"; 153 1.1 jmcneill dr_mode = "otg"; 154 1.1 jmcneill external-vbus-divider; 155 1.1 jmcneill status = "okay"; 156 1.1 jmcneill }; 157