imx6q-cm-fx6.dts revision 1.1.1.4.4.2
1 /* 2 * Copyright 2013 CompuLab Ltd. 3 * 4 * Author: Valentin Raevsky <valentin (at) compulab.co.il> 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPL or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This file is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * version 2 as published by the Free Software Foundation. 14 * 15 * This file is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * Or, alternatively, 21 * 22 * b) Permission is hereby granted, free of charge, to any person 23 * obtaining a copy of this software and associated documentation 24 * files (the "Software"), to deal in the Software without 25 * restriction, including without limitation the rights to use, 26 * copy, modify, merge, publish, distribute, sublicense, and/or 27 * sell copies of the Software, and to permit persons to whom the 28 * Software is furnished to do so, subject to the following 29 * conditions: 30 * 31 * The above copyright notice and this permission notice shall be 32 * included in all copies or substantial portions of the Software. 33 * 34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 41 * OTHER DEALINGS IN THE SOFTWARE. 42 */ 43 44 /dts-v1/; 45 #include <dt-bindings/gpio/gpio.h> 46 #include <dt-bindings/sound/fsl-imx-audmux.h> 47 #include "imx6q.dtsi" 48 49 / { 50 model = "CompuLab CM-FX6"; 51 compatible = "compulab,cm-fx6", "fsl,imx6q"; 52 53 memory@10000000 { 54 reg = <0x10000000 0x80000000>; 55 }; 56 57 leds { 58 compatible = "gpio-leds"; 59 60 heartbeat-led { 61 label = "Heartbeat"; 62 gpios = <&gpio2 31 0>; 63 linux,default-trigger = "heartbeat"; 64 }; 65 }; 66 67 awnh387_pwrseq: pwrseq { 68 pinctrl-names = "default"; 69 pinctrl-0 = <&pinctrl_pwrseq>; 70 compatible = "mmc-pwrseq-sd8787"; 71 powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; 72 reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; 73 }; 74 75 reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio { 76 compatible = "regulator-fixed"; 77 regulator-name = "regulator-pcie-power-on-gpio"; 78 regulator-min-microvolt = <3300000>; 79 regulator-max-microvolt = <3300000>; 80 gpio = <&gpio2 24 GPIO_ACTIVE_LOW>; 81 }; 82 83 reg_usb_h1_vbus: usb_h1_vbus { 84 compatible = "regulator-fixed"; 85 regulator-name = "usb_h1_vbus"; 86 regulator-min-microvolt = <5000000>; 87 regulator-max-microvolt = <5000000>; 88 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; 89 enable-active-high; 90 }; 91 92 reg_usb_otg_vbus: usb_otg_vbus { 93 compatible = "regulator-fixed"; 94 regulator-name = "usb_otg_vbus"; 95 regulator-min-microvolt = <5000000>; 96 regulator-max-microvolt = <5000000>; 97 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 98 enable-active-high; 99 }; 100 101 sound-analog { 102 compatible = "simple-audio-card"; 103 simple-audio-card,name = "On-board analog audio"; 104 simple-audio-card,widgets = 105 "Headphone", "Headphone Jack", 106 "Line", "Line Out", 107 "Microphone", "Mic Jack", 108 "Line", "Line In"; 109 simple-audio-card,routing = 110 "Headphone Jack", "RHPOUT", 111 "Headphone Jack", "LHPOUT", 112 "MICIN", "Mic Bias", 113 "Mic Bias", "Mic Jack"; 114 simple-audio-card,format = "i2s"; 115 simple-audio-card,bitclock-master = <&sound_master>; 116 simple-audio-card,frame-master = <&sound_master>; 117 simple-audio-card,bitclock-inversion; 118 119 sound_master: simple-audio-card,cpu { 120 sound-dai = <&ssi2>; 121 system-clock-frequency = <2822400>; 122 }; 123 124 simple-audio-card,codec { 125 sound-dai = <&wm8731>; 126 }; 127 }; 128 129 sound-spdif { 130 compatible = "fsl,imx-audio-spdif"; 131 model = "imx-spdif"; 132 spdif-controller = <&spdif>; 133 spdif-out; 134 spdif-in; 135 }; 136 }; 137 138 &audmux { 139 pinctrl-names = "default"; 140 pinctrl-0 = <&pinctrl_audmux>; 141 status = "okay"; 142 143 ssi2 { 144 fsl,audmux-port = <1>; 145 fsl,port-config = < 146 (IMX_AUDMUX_V2_PTCR_RCLKDIR | 147 IMX_AUDMUX_V2_PTCR_RCSEL(3 | 0x8) | 148 IMX_AUDMUX_V2_PTCR_TCLKDIR | 149 IMX_AUDMUX_V2_PTCR_TCSEL(3)) 150 IMX_AUDMUX_V2_PDCR_RXDSEL(3) 151 >; 152 }; 153 154 audmux4 { 155 fsl,audmux-port = <3>; 156 fsl,port-config = < 157 (IMX_AUDMUX_V2_PTCR_TFSDIR | 158 IMX_AUDMUX_V2_PTCR_TFSEL(1) | 159 IMX_AUDMUX_V2_PTCR_RCLKDIR | 160 IMX_AUDMUX_V2_PTCR_RCSEL(1 | 0x8) | 161 IMX_AUDMUX_V2_PTCR_TCLKDIR | 162 IMX_AUDMUX_V2_PTCR_TCSEL(1)) 163 IMX_AUDMUX_V2_PDCR_RXDSEL(1) 164 >; 165 }; 166 }; 167 168 &cpu0 { 169 /* 170 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 171 * the module behaves unstable at this frequency. Hence, remove the 172 * 1.2GHz operation point here. 173 */ 174 operating-points = < 175 /* kHz uV */ 176 996000 1250000 177 852000 1250000 178 792000 1175000 179 396000 975000 180 >; 181 fsl,soc-operating-points = < 182 /* ARM kHz SOC-PU uV */ 183 996000 1250000 184 852000 1250000 185 792000 1175000 186 396000 1175000 187 >; 188 }; 189 190 &cpu1 { 191 /* 192 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 193 * the module behaves unstable at this frequency. Hence, remove the 194 * 1.2GHz operation point here. 195 */ 196 operating-points = < 197 /* kHz uV */ 198 996000 1250000 199 852000 1250000 200 792000 1175000 201 396000 975000 202 >; 203 fsl,soc-operating-points = < 204 /* ARM kHz SOC-PU uV */ 205 996000 1250000 206 852000 1250000 207 792000 1175000 208 396000 1175000 209 >; 210 }; 211 212 &cpu2 { 213 /* 214 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 215 * the module behaves unstable at this frequency. Hence, remove the 216 * 1.2GHz operation point here. 217 */ 218 operating-points = < 219 /* kHz uV */ 220 996000 1250000 221 852000 1250000 222 792000 1175000 223 396000 975000 224 >; 225 fsl,soc-operating-points = < 226 /* ARM kHz SOC-PU uV */ 227 996000 1250000 228 852000 1250000 229 792000 1175000 230 396000 1175000 231 >; 232 }; 233 234 &cpu3 { 235 /* 236 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 237 * the module behaves unstable at this frequency. Hence, remove the 238 * 1.2GHz operation point here. 239 */ 240 operating-points = < 241 /* kHz uV */ 242 996000 1250000 243 852000 1250000 244 792000 1175000 245 396000 975000 246 >; 247 fsl,soc-operating-points = < 248 /* ARM kHz SOC-PU uV */ 249 996000 1250000 250 852000 1250000 251 792000 1175000 252 396000 1175000 253 >; 254 }; 255 256 &ecspi1 { 257 cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>; 258 pinctrl-names = "default"; 259 pinctrl-0 = <&pinctrl_ecspi1>; 260 status = "okay"; 261 262 m25p80@0 { 263 #address-cells = <1>; 264 #size-cells = <1>; 265 compatible = "st,m25p", "jedec,spi-nor"; 266 spi-max-frequency = <20000000>; 267 reg = <0>; 268 }; 269 }; 270 271 &fec { 272 pinctrl-names = "default"; 273 pinctrl-0 = <&pinctrl_enet>; 274 phy-mode = "rgmii"; 275 status = "okay"; 276 }; 277 278 &gpmi { 279 pinctrl-names = "default"; 280 pinctrl-0 = <&pinctrl_gpmi_nand>; 281 status = "okay"; 282 }; 283 284 &i2c3 { 285 pinctrl-names = "default"; 286 pinctrl-0 = <&pinctrl_i2c3>; 287 status = "okay"; 288 clock-frequency = <100000>; 289 290 eeprom@50 { 291 compatible = "atmel,24c02"; 292 reg = <0x50>; 293 pagesize = <16>; 294 }; 295 296 wm8731: codec@1a { 297 #sound-dai-cells = <0>; 298 compatible = "wlf,wm8731"; 299 reg = <0x1a>; 300 }; 301 }; 302 303 &iomuxc { 304 pinctrl_audmux: audmuxgrp { 305 fsl,pins = < 306 MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 307 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 308 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 309 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 310 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 311 >; 312 }; 313 314 pinctrl_ecspi1: ecspi1grp { 315 fsl,pins = < 316 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 317 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 318 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 319 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 320 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 321 >; 322 }; 323 324 pinctrl_enet: enetgrp { 325 fsl,pins = < 326 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 327 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 328 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 329 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 330 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 331 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 332 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 333 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 334 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 335 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 336 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 337 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 338 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 339 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 340 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 341 >; 342 }; 343 344 pinctrl_gpmi_nand: gpminandgrp { 345 fsl,pins = < 346 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 347 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 348 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 349 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 350 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 351 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 352 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 353 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 354 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 355 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 356 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 357 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 358 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 359 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 360 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 361 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 362 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 363 >; 364 }; 365 366 pinctrl_i2c3: i2c3grp { 367 fsl,pins = < 368 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 369 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 370 >; 371 }; 372 373 pinctrl_pcie: pciegrp { 374 fsl,pins = < 375 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 376 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1 377 >; 378 }; 379 380 pinctrl_pwrseq: pwrseqgrp { 381 fsl,pins = < 382 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 383 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 384 >; 385 }; 386 387 pinctrl_spdif: spdifgrp { 388 fsl,pins = < 389 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 390 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 391 >; 392 }; 393 394 pinctrl_uart4: uart4grp { 395 fsl,pins = < 396 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 397 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 398 >; 399 }; 400 401 pinctrl_usbh1: usbh1grp { 402 fsl,pins = < 403 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1 404 >; 405 }; 406 407 pinctrl_usbotg: usbotggrp { 408 fsl,pins = < 409 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 410 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0 411 >; 412 }; 413 414 pinctrl_usdhc1: usdhc1grp { 415 fsl,pins = < 416 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 417 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 418 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 419 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 420 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 421 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 422 >; 423 }; 424 }; 425 426 &pcie { 427 pinctrl-names = "default"; 428 pinctrl-0 = <&pinctrl_pcie>; 429 reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>; 430 vpcie-supply = <®_pcie_power_on_gpio>; 431 status = "okay"; 432 }; 433 434 &sata { 435 status = "okay"; 436 }; 437 438 &snvs_poweroff { 439 status = "okay"; 440 }; 441 442 &spdif { 443 pinctrl-names = "default"; 444 pinctrl-0 = <&pinctrl_spdif>; 445 status = "okay"; 446 }; 447 448 &ssi2 { 449 assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>, 450 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>; 451 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>; 452 assigned-clock-rates = <0>, <786432000>; 453 status = "okay"; 454 }; 455 456 &uart4 { 457 pinctrl-names = "default"; 458 pinctrl-0 = <&pinctrl_uart4>; 459 status = "okay"; 460 }; 461 462 &usbh1 { 463 vbus-supply = <®_usb_h1_vbus>; 464 pinctrl-names = "default"; 465 pinctrl-0 = <&pinctrl_usbh1>; 466 status = "okay"; 467 }; 468 469 &usbotg { 470 vbus-supply = <®_usb_otg_vbus>; 471 pinctrl-names = "default"; 472 pinctrl-0 = <&pinctrl_usbotg>; 473 dr_mode = "otg"; 474 status = "okay"; 475 }; 476 477 &usdhc1 { 478 pinctrl-names = "default"; 479 pinctrl-0 = <&pinctrl_usdhc1>; 480 mmc-pwrseq = <&awnh387_pwrseq>; 481 non-removable; 482 /* 483 * If the OS probes the Bluetooth AMP function advertised on this bus 484 * but the firmware in place does not support it, the WiFi/BT module 485 * gets unresponsive. 486 * Users who configured their OS properly can enable this node to gain 487 * WiFi and/or plain Bluetooth support. 488 */ 489 status = "disabled"; 490 }; 491
Indexes created Sat Oct 25 10:09:55 GMT 2025