imx6q-tbs2910.dts revision 1.1.1.2
1 /* 2 * Copyright 2014 Soeren Moch <smoch (at) web.de> 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public 20 * License along with this file; if not, write to the Free 21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 22 * MA 02110-1301 USA 23 * 24 * Or, alternatively, 25 * 26 * b) Permission is hereby granted, free of charge, to any person 27 * obtaining a copy of this software and associated documentation 28 * files (the "Software"), to deal in the Software without 29 * restriction, including without limitation the rights to use, 30 * copy, modify, merge, publish, distribute, sublicense, and/or 31 * sell copies of the Software, and to permit persons to whom the 32 * Software is furnished to do so, subject to the following 33 * conditions: 34 * 35 * The above copyright notice and this permission notice shall be 36 * included in all copies or substantial portions of the Software. 37 * 38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45 * OTHER DEALINGS IN THE SOFTWARE. 46 */ 47 48 /dts-v1/; 49 50 #include "imx6q.dtsi" 51 #include <dt-bindings/gpio/gpio.h> 52 #include <dt-bindings/input/input.h> 53 54 / { 55 model = "TBS2910 Matrix ARM mini PC"; 56 compatible = "tbs,imx6q-tbs2910", "fsl,imx6q"; 57 58 chosen { 59 stdout-path = &uart1; 60 }; 61 62 memory { 63 reg = <0x10000000 0x80000000>; 64 }; 65 66 fan { 67 compatible = "gpio-fan"; 68 pinctrl-names = "default"; 69 pinctrl-0 = <&pinctrl_gpio_fan>; 70 gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; 71 gpio-fan,speed-map = <0 0 72 3000 1>; 73 }; 74 75 ir_recv { 76 compatible = "gpio-ir-receiver"; 77 gpios = <&gpio3 18 GPIO_ACTIVE_LOW>; 78 pinctrl-names = "default"; 79 pinctrl-0 = <&pinctrl_ir>; 80 }; 81 82 leds { 83 compatible = "gpio-leds"; 84 pinctrl-names = "default"; 85 pinctrl-0 = <&pinctrl_gpio_leds>; 86 87 blue { 88 label = "blue_status_led"; 89 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 90 default-state = "keep"; 91 }; 92 }; 93 94 reg_2p5v: regulator-2p5v { 95 compatible = "regulator-fixed"; 96 regulator-name = "2P5V"; 97 regulator-min-microvolt = <2500000>; 98 regulator-max-microvolt = <2500000>; 99 }; 100 101 reg_3p3v: regulator-3p3v { 102 compatible = "regulator-fixed"; 103 regulator-name = "3P3V"; 104 regulator-min-microvolt = <3300000>; 105 regulator-max-microvolt = <3300000>; 106 }; 107 108 reg_5p0v: regulator-5p0v { 109 compatible = "regulator-fixed"; 110 regulator-name = "5P0V"; 111 regulator-min-microvolt = <5000000>; 112 regulator-max-microvolt = <5000000>; 113 }; 114 115 sound-sgtl5000 { 116 audio-codec = <&sgtl5000>; 117 audio-routing = 118 "MIC_IN", "Mic Jack", 119 "Mic Jack", "Mic Bias", 120 "Headphone Jack", "HP_OUT"; 121 compatible = "fsl,imx-audio-sgtl5000"; 122 model = "On-board Codec"; 123 mux-ext-port = <3>; 124 mux-int-port = <1>; 125 ssi-controller = <&ssi1>; 126 }; 127 128 sound-spdif { 129 compatible = "fsl,imx-audio-spdif"; 130 model = "On-board SPDIF"; 131 spdif-controller = <&spdif>; 132 spdif-out; 133 }; 134 }; 135 136 &audmux { 137 status = "okay"; 138 }; 139 140 &fec { 141 pinctrl-names = "default"; 142 pinctrl-0 = <&pinctrl_enet>; 143 phy-mode = "rgmii"; 144 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 145 status = "okay"; 146 }; 147 148 &hdmi { 149 pinctrl-names = "default"; 150 pinctrl-0 = <&pinctrl_hdmi>; 151 ddc-i2c-bus = <&i2c2>; 152 status = "okay"; 153 }; 154 155 &i2c1 { 156 clock-frequency = <100000>; 157 pinctrl-names = "default"; 158 pinctrl-0 = <&pinctrl_i2c1>; 159 status = "okay"; 160 161 sgtl5000: sgtl5000@a { 162 clocks = <&clks IMX6QDL_CLK_CKO>; 163 compatible = "fsl,sgtl5000"; 164 pinctrl-names = "default"; 165 pinctrl-0 = <&pinctrl_sgtl5000>; 166 reg = <0x0a>; 167 VDDA-supply = <®_2p5v>; 168 VDDIO-supply = <®_3p3v>; 169 }; 170 }; 171 172 &i2c2 { 173 clock-frequency = <100000>; 174 pinctrl-names = "default"; 175 pinctrl-0 = <&pinctrl_i2c2>; 176 status = "okay"; 177 }; 178 179 &i2c3 { 180 clock-frequency = <100000>; 181 pinctrl-names = "default"; 182 pinctrl-0 = <&pinctrl_i2c3>; 183 status = "okay"; 184 185 rtc: ds1307@68 { 186 compatible = "dallas,ds1307"; 187 reg = <0x68>; 188 }; 189 }; 190 191 &pcie { 192 pinctrl-names = "default"; 193 pinctrl-0 = <&pinctrl_pcie>; 194 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; 195 status = "okay"; 196 }; 197 198 &sata { 199 fsl,transmit-level-mV = <1104>; 200 fsl,transmit-boost-mdB = <3330>; 201 fsl,transmit-atten-16ths = <16>; 202 fsl,receive-eq-mdB = <3000>; 203 status = "okay"; 204 }; 205 206 &snvs_poweroff { 207 status = "okay"; 208 }; 209 210 &spdif { 211 pinctrl-names = "default"; 212 pinctrl-0 = <&pinctrl_spdif>; 213 status = "okay"; 214 }; 215 216 &ssi1 { 217 status = "okay"; 218 }; 219 220 &uart1 { 221 pinctrl-names = "default"; 222 pinctrl-0 = <&pinctrl_uart1>; 223 status = "okay"; 224 }; 225 226 &uart2 { 227 pinctrl-names = "default"; 228 pinctrl-0 = <&pinctrl_uart2>; 229 status = "okay"; 230 }; 231 232 &usbh1 { 233 vbus-supply = <®_5p0v>; 234 status = "okay"; 235 }; 236 237 &usbotg { 238 vbus-supply = <®_5p0v>; 239 pinctrl-names = "default"; 240 pinctrl-0 = <&pinctrl_usbotg>; 241 disable-over-current; 242 status = "okay"; 243 }; 244 245 &usdhc2 { 246 pinctrl-names = "default"; 247 pinctrl-0 = <&pinctrl_usdhc2>; 248 bus-width = <4>; 249 cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; 250 vmmc-supply = <®_3p3v>; 251 vqmmc-supply = <®_3p3v>; 252 voltage-ranges = <3300 3300>; 253 no-1-8-v; 254 status = "okay"; 255 }; 256 257 &usdhc3 { 258 pinctrl-names = "default"; 259 pinctrl-0 = <&pinctrl_usdhc3>; 260 bus-width = <4>; 261 cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 262 wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; 263 vmmc-supply = <®_3p3v>; 264 vqmmc-supply = <®_3p3v>; 265 voltage-ranges = <3300 3300>; 266 no-1-8-v; 267 status = "okay"; 268 }; 269 270 &usdhc4 { 271 pinctrl-names = "default"; 272 pinctrl-0 = <&pinctrl_usdhc4>; 273 bus-width = <8>; 274 vmmc-supply = <®_3p3v>; 275 vqmmc-supply = <®_3p3v>; 276 voltage-ranges = <3300 3300>; 277 non-removable; 278 no-1-8-v; 279 status = "okay"; 280 }; 281 282 &iomuxc { 283 pinctrl_enet: enetgrp { 284 fsl,pins = < 285 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 286 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 287 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 288 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 289 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 290 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 291 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 292 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 293 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 294 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 295 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 296 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 297 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 298 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 299 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 300 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 301 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059 302 >; 303 }; 304 305 pinctrl_gpio_fan: gpiofangrp { 306 fsl,pins = < 307 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1 308 >; 309 }; 310 311 pinctrl_gpio_leds: gpioledsgrp { 312 fsl,pins = < 313 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1 314 >; 315 }; 316 317 pinctrl_hdmi: hdmigrp { 318 fsl,pins = < 319 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 320 >; 321 }; 322 323 pinctrl_i2c1: i2c1grp { 324 fsl,pins = < 325 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 326 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 327 >; 328 }; 329 330 pinctrl_i2c2: i2c2grp { 331 fsl,pins = < 332 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 333 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 334 >; 335 }; 336 337 pinctrl_i2c3: i2c3grp { 338 fsl,pins = < 339 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 340 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 341 >; 342 }; 343 344 pinctrl_ir: irgrp { 345 fsl,pins = < 346 MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059 347 >; 348 }; 349 350 pinctrl_pcie: pciegrp { 351 fsl,pins = < 352 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059 353 >; 354 }; 355 356 pinctrl_sgtl5000: sgtl5000grp { 357 fsl,pins = < 358 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 359 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 360 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 361 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 362 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 363 >; 364 }; 365 366 pinctrl_spdif: spdifgrp { 367 fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091 368 >; 369 }; 370 371 pinctrl_uart1: uart1grp { 372 fsl,pins = < 373 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 374 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 375 >; 376 }; 377 378 pinctrl_uart2: uart2grp { 379 fsl,pins = < 380 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 381 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 382 >; 383 }; 384 385 pinctrl_usbotg: usbotggrp { 386 fsl,pins = < 387 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 388 >; 389 }; 390 391 pinctrl_usdhc2: usdhc2grp { 392 fsl,pins = < 393 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 394 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 395 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 396 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 397 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 398 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 399 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059 400 >; 401 }; 402 403 pinctrl_usdhc3: usdhc3grp { 404 fsl,pins = < 405 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 406 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 407 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 408 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 409 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 410 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 411 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059 412 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059 413 >; 414 }; 415 416 pinctrl_usdhc4: usdhc4grp { 417 fsl,pins = < 418 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 419 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 420 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 421 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 422 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 423 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 424 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 425 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 426 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 427 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 428 >; 429 }; 430 }; 431
Indexes created Tue Oct 21 15:09:54 GMT 2025