1 1.1.1.3 jmcneill // SPDX-License-Identifier: GPL-2.0+ OR MIT 2 1.1.1.3 jmcneill // 3 1.1.1.3 jmcneill // Copyright 2016 Freescale Semiconductor, Inc. 4 1.1 jmcneill 5 1.1 jmcneill /dts-v1/; 6 1.1 jmcneill 7 1.1 jmcneill #include "imx6qp.dtsi" 8 1.1 jmcneill #include "imx6qdl-sabresd.dtsi" 9 1.1 jmcneill 10 1.1 jmcneill / { 11 1.1 jmcneill model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board"; 12 1.1 jmcneill compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp"; 13 1.1 jmcneill }; 14 1.1 jmcneill 15 1.1.1.2 jmcneill ®_arm { 16 1.1.1.2 jmcneill vin-supply = <&sw2_reg>; 17 1.1 jmcneill }; 18 1.1 jmcneill 19 1.1 jmcneill &iomuxc { 20 1.1 jmcneill imx6qdl-sabresd { 21 1.1 jmcneill pinctrl_usdhc2: usdhc2grp { 22 1.1 jmcneill fsl,pins = < 23 1.1 jmcneill MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 24 1.1 jmcneill MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 25 1.1 jmcneill MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 26 1.1 jmcneill MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 27 1.1 jmcneill MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 28 1.1 jmcneill MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 29 1.1 jmcneill MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 30 1.1 jmcneill MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 31 1.1 jmcneill MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 32 1.1 jmcneill MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 33 1.1 jmcneill >; 34 1.1 jmcneill }; 35 1.1 jmcneill 36 1.1 jmcneill pinctrl_usdhc3: usdhc3grp { 37 1.1 jmcneill fsl,pins = < 38 1.1 jmcneill MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 39 1.1 jmcneill MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071 40 1.1 jmcneill MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 41 1.1 jmcneill MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 42 1.1 jmcneill MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 43 1.1 jmcneill MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 44 1.1 jmcneill MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 45 1.1 jmcneill MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 46 1.1 jmcneill MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 47 1.1 jmcneill MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 48 1.1 jmcneill >; 49 1.1 jmcneill }; 50 1.1 jmcneill }; 51 1.1 jmcneill }; 52 1.1 jmcneill 53 1.1 jmcneill &pcie { 54 1.1 jmcneill status = "disabled"; 55 1.1 jmcneill }; 56 1.1.1.4 jmcneill 57 1.1.1.4 jmcneill &sata { 58 1.1.1.4 jmcneill status = "okay"; 59 1.1.1.4 jmcneill }; 60