1 1.1.1.2 jmcneill // SPDX-License-Identifier: GPL-2.0 2 1.1 jmcneill /* 3 1.1 jmcneill * kirkwood-viper.dts - Device Tree file for Linksys viper (E4200v2 / EA4500) 4 1.1 jmcneill * 5 1.1 jmcneill * (c) 2013 Jonas Gorski <jogo (a] openwrt.org> 6 1.1 jmcneill * (c) 2013 Deutsche Telekom Innovation Laboratories 7 1.1 jmcneill * (c) 2014 Luka Perkov <luka (a] openwrt.org> 8 1.1 jmcneill * (c) 2014 Randy C. Will <randall.will (a] gmail.com> 9 1.1 jmcneill * 10 1.1 jmcneill */ 11 1.1 jmcneill 12 1.1 jmcneill /dts-v1/; 13 1.1 jmcneill 14 1.1 jmcneill #include "kirkwood.dtsi" 15 1.1 jmcneill #include "kirkwood-6282.dtsi" 16 1.1 jmcneill 17 1.1 jmcneill / { 18 1.1 jmcneill model = "Linksys Viper (E4200v2 / EA4500)"; 19 1.1 jmcneill compatible = "linksys,viper", "marvell,kirkwood-88f6282", "marvell,kirkwood"; 20 1.1 jmcneill 21 1.1 jmcneill memory { 22 1.1 jmcneill device_type = "memory"; 23 1.1 jmcneill reg = <0x00000000 0x8000000>; 24 1.1 jmcneill }; 25 1.1 jmcneill 26 1.1 jmcneill aliases { 27 1.1 jmcneill serial0 = &uart0; 28 1.1 jmcneill }; 29 1.1 jmcneill 30 1.1 jmcneill chosen { 31 1.1 jmcneill stdout-path = "serial0:115200n8"; 32 1.1 jmcneill }; 33 1.1 jmcneill 34 1.1 jmcneill gpio_keys { 35 1.1 jmcneill compatible = "gpio-keys"; 36 1.1 jmcneill #address-cells = <1>; 37 1.1 jmcneill #size-cells = <0>; 38 1.1 jmcneill pinctrl-0 = < &pmx_btn_wps &pmx_btn_reset >; 39 1.1 jmcneill pinctrl-names = "default"; 40 1.1 jmcneill 41 1.1 jmcneill wps { 42 1.1 jmcneill label = "WPS Button"; 43 1.1 jmcneill linux,code = <KEY_WPS_BUTTON>; 44 1.1 jmcneill gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; 45 1.1 jmcneill }; 46 1.1 jmcneill 47 1.1 jmcneill reset { 48 1.1 jmcneill label = "Reset Button"; 49 1.1 jmcneill linux,code = <KEY_RESTART>; 50 1.1 jmcneill gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; 51 1.1 jmcneill }; 52 1.1 jmcneill }; 53 1.1 jmcneill 54 1.1 jmcneill gpio-leds { 55 1.1 jmcneill compatible = "gpio-leds"; 56 1.1 jmcneill pinctrl-0 = < &pmx_led_white_health &pmx_led_white_pulse >; 57 1.1 jmcneill pinctrl-names = "default"; 58 1.1 jmcneill 59 1.1 jmcneill white-health { 60 1.1 jmcneill label = "viper:white:health"; 61 1.1 jmcneill gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; 62 1.1 jmcneill }; 63 1.1 jmcneill 64 1.1 jmcneill white-pulse { 65 1.1 jmcneill label = "viper:white:pulse"; 66 1.1 jmcneill gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; 67 1.1 jmcneill }; 68 1.1 jmcneill }; 69 1.1 jmcneill }; 70 1.1 jmcneill 71 1.1 jmcneill &pinctrl { 72 1.1 jmcneill pmx_led_white_health: pmx-led-white-health { 73 1.1 jmcneill marvell,pins = "mpp7"; 74 1.1 jmcneill marvell,function = "gpo"; 75 1.1 jmcneill }; 76 1.1 jmcneill pmx_led_white_pulse: pmx-led-white-pulse { 77 1.1 jmcneill marvell,pins = "mpp14"; 78 1.1 jmcneill marvell,function = "gpio"; 79 1.1 jmcneill }; 80 1.1 jmcneill pmx_btn_wps: pmx-btn-wps { 81 1.1 jmcneill marvell,pins = "mpp47"; 82 1.1 jmcneill marvell,function = "gpio"; 83 1.1 jmcneill }; 84 1.1 jmcneill pmx_btn_reset: pmx-btn-reset { 85 1.1 jmcneill marvell,pins = "mpp48"; 86 1.1 jmcneill marvell,function = "gpio"; 87 1.1 jmcneill }; 88 1.1 jmcneill }; 89 1.1 jmcneill 90 1.1 jmcneill &nand { 91 1.1 jmcneill status = "okay"; 92 1.1 jmcneill pinctrl-0 = <&pmx_nand>; 93 1.1 jmcneill pinctrl-names = "default"; 94 1.1 jmcneill 95 1.1 jmcneill partitions { 96 1.1 jmcneill compatible = "fixed-partitions"; 97 1.1 jmcneill #address-cells = <1>; 98 1.1 jmcneill #size-cells = <1>; 99 1.1 jmcneill 100 1.1 jmcneill partition@0 { 101 1.1 jmcneill label = "u-boot"; 102 1.1 jmcneill reg = <0x0 0x80000>; 103 1.1 jmcneill read-only; 104 1.1 jmcneill }; 105 1.1 jmcneill 106 1.1 jmcneill partition@80000 { 107 1.1 jmcneill label = "u_env"; 108 1.1 jmcneill reg = <0x80000 0x20000>; 109 1.1 jmcneill }; 110 1.1 jmcneill 111 1.1.1.2 jmcneill partition@a0000 { 112 1.1 jmcneill label = "s_env"; 113 1.1 jmcneill reg = <0xA0000 0x20000>; 114 1.1 jmcneill }; 115 1.1 jmcneill 116 1.1 jmcneill partition@200000 { 117 1.1 jmcneill label = "kernel"; 118 1.1 jmcneill reg = <0x200000 0x2A0000>; 119 1.1 jmcneill }; 120 1.1 jmcneill 121 1.1.1.2 jmcneill partition@4a0000 { 122 1.1 jmcneill label = "rootfs"; 123 1.1 jmcneill reg = <0x4A0000 0x1760000>; 124 1.1 jmcneill }; 125 1.1 jmcneill 126 1.1.1.2 jmcneill partition@1c00000 { 127 1.1 jmcneill label = "alt_kernel"; 128 1.1 jmcneill reg = <0x1C00000 0x2A0000>; 129 1.1 jmcneill }; 130 1.1 jmcneill 131 1.1.1.2 jmcneill partition@1ea0000 { 132 1.1 jmcneill label = "alt_rootfs"; 133 1.1 jmcneill reg = <0x1EA0000 0x1760000>; 134 1.1 jmcneill }; 135 1.1 jmcneill 136 1.1 jmcneill partition@3600000 { 137 1.1 jmcneill label = "syscfg"; 138 1.1 jmcneill reg = <0x3600000 0x4A00000>; 139 1.1 jmcneill }; 140 1.1 jmcneill 141 1.1.1.2 jmcneill partition@c0000 { 142 1.1 jmcneill label = "unused"; 143 1.1 jmcneill reg = <0xC0000 0x140000>; 144 1.1 jmcneill }; 145 1.1 jmcneill 146 1.1 jmcneill }; 147 1.1 jmcneill }; 148 1.1 jmcneill 149 1.1 jmcneill &pciec { 150 1.1 jmcneill status = "okay"; 151 1.1 jmcneill }; 152 1.1 jmcneill 153 1.1 jmcneill &pcie0 { 154 1.1 jmcneill status = "okay"; 155 1.1 jmcneill }; 156 1.1 jmcneill 157 1.1 jmcneill &pcie1 { 158 1.1 jmcneill status = "okay"; 159 1.1 jmcneill }; 160 1.1 jmcneill 161 1.1 jmcneill &mdio { 162 1.1 jmcneill status = "okay"; 163 1.1 jmcneill 164 1.1 jmcneill switch@10 { 165 1.1 jmcneill compatible = "marvell,mv88e6085"; 166 1.1 jmcneill #address-cells = <1>; 167 1.1 jmcneill #size-cells = <0>; 168 1.1 jmcneill reg = <16>; 169 1.1 jmcneill 170 1.1 jmcneill ports { 171 1.1 jmcneill #address-cells = <1>; 172 1.1 jmcneill #size-cells = <0>; 173 1.1 jmcneill 174 1.1 jmcneill port@0 { 175 1.1 jmcneill reg = <0>; 176 1.1 jmcneill label = "ethernet1"; 177 1.1 jmcneill }; 178 1.1 jmcneill 179 1.1 jmcneill port@1 { 180 1.1 jmcneill reg = <1>; 181 1.1 jmcneill label = "ethernet2"; 182 1.1 jmcneill }; 183 1.1 jmcneill 184 1.1 jmcneill port@2 { 185 1.1 jmcneill reg = <2>; 186 1.1 jmcneill label = "ethernet3"; 187 1.1 jmcneill }; 188 1.1 jmcneill 189 1.1 jmcneill port@3 { 190 1.1 jmcneill reg = <3>; 191 1.1 jmcneill label = "ethernet4"; 192 1.1 jmcneill }; 193 1.1 jmcneill 194 1.1 jmcneill port@4 { 195 1.1 jmcneill reg = <4>; 196 1.1 jmcneill label = "internet"; 197 1.1 jmcneill }; 198 1.1 jmcneill 199 1.1 jmcneill port@5 { 200 1.1 jmcneill reg = <5>; 201 1.1 jmcneill label = "cpu"; 202 1.1 jmcneill ethernet = <ð0port>; 203 1.1 jmcneill fixed-link { 204 1.1 jmcneill speed = <1000>; 205 1.1 jmcneill full-duplex; 206 1.1 jmcneill }; 207 1.1 jmcneill }; 208 1.1 jmcneill }; 209 1.1 jmcneill }; 210 1.1 jmcneill }; 211 1.1 jmcneill 212 1.1 jmcneill &uart0 { 213 1.1 jmcneill status = "okay"; 214 1.1 jmcneill }; 215 1.1 jmcneill 216 1.1 jmcneill /* eth0 is connected to a Marvell 88E6171 switch, without a PHY. So set 217 1.1 jmcneill * fixed speed and duplex. 218 1.1 jmcneill */ 219 1.1 jmcneill ð0 { 220 1.1 jmcneill status = "okay"; 221 1.1 jmcneill ethernet0-port@0 { 222 1.1 jmcneill speed = <1000>; 223 1.1 jmcneill duplex = <1>; 224 1.1 jmcneill }; 225 1.1 jmcneill }; 226 1.1 jmcneill 227 1.1 jmcneill /* eth1 is connected to the switch at port 6. However DSA only supports a 228 1.1 jmcneill * single CPU port. So leave this port disabled to avoid confusion. 229 1.1 jmcneill */ 230 1.1 jmcneill ð1 { 231 1.1 jmcneill status = "disabled"; 232 1.1 jmcneill }; 233 1.1 jmcneill 234 1.1 jmcneill /* There is no battery on the board, so the RTC does not keep 235 1.1 jmcneill * time when there is no power, making it useless. 236 1.1 jmcneill */ 237 1.1 jmcneill &rtc { 238 1.1 jmcneill status = "disabled"; 239 1.1 jmcneill }; 240 1.1 jmcneill 241