1 1.1 jmcneill /* 2 1.1.1.3 jmcneill * Copyright 2017-2018 Sean Wang <sean.wang (at) mediatek.com> 3 1.1 jmcneill * 4 1.1 jmcneill * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 1.1 jmcneill */ 6 1.1 jmcneill 7 1.1 jmcneill /dts-v1/; 8 1.1 jmcneill #include <dt-bindings/input/input.h> 9 1.1.1.5 jmcneill #include "mt7623n.dtsi" 10 1.1 jmcneill #include "mt6323.dtsi" 11 1.1 jmcneill 12 1.1 jmcneill / { 13 1.1 jmcneill model = "Bananapi BPI-R2"; 14 1.1 jmcneill compatible = "bananapi,bpi-r2", "mediatek,mt7623"; 15 1.1 jmcneill 16 1.1 jmcneill aliases { 17 1.1 jmcneill serial2 = &uart2; 18 1.1 jmcneill }; 19 1.1 jmcneill 20 1.1 jmcneill chosen { 21 1.1 jmcneill stdout-path = "serial2:115200n8"; 22 1.1 jmcneill }; 23 1.1 jmcneill 24 1.1.1.5 jmcneill connector { 25 1.1.1.5 jmcneill compatible = "hdmi-connector"; 26 1.1.1.5 jmcneill label = "hdmi"; 27 1.1.1.5 jmcneill type = "d"; 28 1.1.1.5 jmcneill ddc-i2c-bus = <&hdmiddc0>; 29 1.1.1.5 jmcneill 30 1.1.1.5 jmcneill port { 31 1.1.1.5 jmcneill hdmi_connector_in: endpoint { 32 1.1.1.5 jmcneill remote-endpoint = <&hdmi0_out>; 33 1.1.1.5 jmcneill }; 34 1.1.1.5 jmcneill }; 35 1.1.1.5 jmcneill }; 36 1.1.1.5 jmcneill 37 1.1 jmcneill cpus { 38 1.1 jmcneill cpu@0 { 39 1.1 jmcneill proc-supply = <&mt6323_vproc_reg>; 40 1.1 jmcneill }; 41 1.1 jmcneill 42 1.1 jmcneill cpu@1 { 43 1.1 jmcneill proc-supply = <&mt6323_vproc_reg>; 44 1.1 jmcneill }; 45 1.1 jmcneill 46 1.1 jmcneill cpu@2 { 47 1.1 jmcneill proc-supply = <&mt6323_vproc_reg>; 48 1.1 jmcneill }; 49 1.1 jmcneill 50 1.1 jmcneill cpu@3 { 51 1.1 jmcneill proc-supply = <&mt6323_vproc_reg>; 52 1.1 jmcneill }; 53 1.1 jmcneill }; 54 1.1 jmcneill 55 1.1.1.2 jmcneill reg_1p8v: regulator-1p8v { 56 1.1.1.2 jmcneill compatible = "regulator-fixed"; 57 1.1.1.2 jmcneill regulator-name = "fixed-1.8V"; 58 1.1.1.2 jmcneill regulator-min-microvolt = <1800000>; 59 1.1.1.2 jmcneill regulator-max-microvolt = <1800000>; 60 1.1.1.2 jmcneill regulator-boot-on; 61 1.1.1.2 jmcneill regulator-always-on; 62 1.1.1.2 jmcneill }; 63 1.1.1.2 jmcneill 64 1.1.1.2 jmcneill reg_3p3v: regulator-3p3v { 65 1.1.1.2 jmcneill compatible = "regulator-fixed"; 66 1.1.1.2 jmcneill regulator-name = "fixed-3.3V"; 67 1.1.1.2 jmcneill regulator-min-microvolt = <3300000>; 68 1.1.1.2 jmcneill regulator-max-microvolt = <3300000>; 69 1.1.1.2 jmcneill regulator-boot-on; 70 1.1.1.2 jmcneill regulator-always-on; 71 1.1.1.2 jmcneill }; 72 1.1.1.2 jmcneill 73 1.1.1.2 jmcneill reg_5v: regulator-5v { 74 1.1.1.2 jmcneill compatible = "regulator-fixed"; 75 1.1.1.2 jmcneill regulator-name = "fixed-5V"; 76 1.1.1.2 jmcneill regulator-min-microvolt = <5000000>; 77 1.1.1.2 jmcneill regulator-max-microvolt = <5000000>; 78 1.1.1.2 jmcneill regulator-boot-on; 79 1.1.1.2 jmcneill regulator-always-on; 80 1.1.1.2 jmcneill }; 81 1.1.1.2 jmcneill 82 1.1.1.5 jmcneill reg_vgpu: fixedregulator@0 { 83 1.1.1.5 jmcneill compatible = "regulator-fixed"; 84 1.1.1.5 jmcneill regulator-name = "vdd_fixed_vgpu"; 85 1.1.1.5 jmcneill regulator-min-microvolt = <1150000>; 86 1.1.1.5 jmcneill regulator-max-microvolt = <1150000>; 87 1.1.1.5 jmcneill }; 88 1.1.1.5 jmcneill 89 1.1.1.2 jmcneill gpio-keys { 90 1.1 jmcneill compatible = "gpio-keys"; 91 1.1 jmcneill pinctrl-names = "default"; 92 1.1 jmcneill pinctrl-0 = <&key_pins_a>; 93 1.1 jmcneill 94 1.1 jmcneill factory { 95 1.1 jmcneill label = "factory"; 96 1.1 jmcneill linux,code = <BTN_0>; 97 1.1 jmcneill gpios = <&pio 256 GPIO_ACTIVE_LOW>; 98 1.1 jmcneill }; 99 1.1 jmcneill 100 1.1 jmcneill wps { 101 1.1 jmcneill label = "wps"; 102 1.1 jmcneill linux,code = <KEY_WPS_BUTTON>; 103 1.1 jmcneill gpios = <&pio 257 GPIO_ACTIVE_HIGH>; 104 1.1 jmcneill }; 105 1.1 jmcneill }; 106 1.1 jmcneill 107 1.1 jmcneill leds { 108 1.1 jmcneill compatible = "gpio-leds"; 109 1.1 jmcneill pinctrl-names = "default"; 110 1.1 jmcneill pinctrl-0 = <&led_pins_a>; 111 1.1 jmcneill 112 1.1 jmcneill blue { 113 1.1 jmcneill label = "bpi-r2:pio:blue"; 114 1.1.1.4 jmcneill gpios = <&pio 240 GPIO_ACTIVE_LOW>; 115 1.1 jmcneill default-state = "off"; 116 1.1 jmcneill }; 117 1.1 jmcneill 118 1.1 jmcneill green { 119 1.1 jmcneill label = "bpi-r2:pio:green"; 120 1.1.1.4 jmcneill gpios = <&pio 241 GPIO_ACTIVE_LOW>; 121 1.1 jmcneill default-state = "off"; 122 1.1 jmcneill }; 123 1.1 jmcneill 124 1.1 jmcneill red { 125 1.1 jmcneill label = "bpi-r2:pio:red"; 126 1.1.1.4 jmcneill gpios = <&pio 239 GPIO_ACTIVE_LOW>; 127 1.1 jmcneill default-state = "off"; 128 1.1 jmcneill }; 129 1.1 jmcneill }; 130 1.1 jmcneill 131 1.1 jmcneill memory@80000000 { 132 1.1.1.3 jmcneill device_type = "memory"; 133 1.1.1.3 jmcneill reg = <0 0x80000000 0 0x80000000>; 134 1.1 jmcneill }; 135 1.1 jmcneill }; 136 1.1 jmcneill 137 1.1.1.5 jmcneill &bls { 138 1.1.1.5 jmcneill status = "okay"; 139 1.1.1.5 jmcneill }; 140 1.1.1.5 jmcneill 141 1.1.1.3 jmcneill &btif { 142 1.1.1.3 jmcneill status = "okay"; 143 1.1.1.3 jmcneill }; 144 1.1.1.3 jmcneill 145 1.1.1.5 jmcneill &cec { 146 1.1.1.5 jmcneill status = "okay"; 147 1.1.1.5 jmcneill }; 148 1.1.1.5 jmcneill 149 1.1 jmcneill &cir { 150 1.1 jmcneill pinctrl-names = "default"; 151 1.1 jmcneill pinctrl-0 = <&cir_pins_a>; 152 1.1 jmcneill status = "okay"; 153 1.1 jmcneill }; 154 1.1 jmcneill 155 1.1 jmcneill &crypto { 156 1.1 jmcneill status = "okay"; 157 1.1 jmcneill }; 158 1.1 jmcneill 159 1.1.1.5 jmcneill &dpi0 { 160 1.1.1.5 jmcneill status = "okay"; 161 1.1.1.5 jmcneill 162 1.1.1.5 jmcneill ports { 163 1.1.1.5 jmcneill #address-cells = <1>; 164 1.1.1.5 jmcneill #size-cells = <0>; 165 1.1.1.5 jmcneill port@0 { 166 1.1.1.5 jmcneill reg = <0>; 167 1.1.1.5 jmcneill dpi0_out: endpoint { 168 1.1.1.5 jmcneill remote-endpoint = <&hdmi0_in>; 169 1.1.1.5 jmcneill }; 170 1.1.1.5 jmcneill }; 171 1.1.1.5 jmcneill }; 172 1.1.1.5 jmcneill }; 173 1.1.1.5 jmcneill 174 1.1 jmcneill ð { 175 1.1 jmcneill status = "okay"; 176 1.1 jmcneill 177 1.1 jmcneill gmac0: mac@0 { 178 1.1 jmcneill compatible = "mediatek,eth-mac"; 179 1.1 jmcneill reg = <0>; 180 1.1 jmcneill phy-mode = "trgmii"; 181 1.1 jmcneill 182 1.1 jmcneill fixed-link { 183 1.1 jmcneill speed = <1000>; 184 1.1 jmcneill full-duplex; 185 1.1 jmcneill pause; 186 1.1 jmcneill }; 187 1.1 jmcneill }; 188 1.1 jmcneill 189 1.1 jmcneill mdio: mdio-bus { 190 1.1 jmcneill #address-cells = <1>; 191 1.1 jmcneill #size-cells = <0>; 192 1.1 jmcneill 193 1.1 jmcneill switch@0 { 194 1.1 jmcneill compatible = "mediatek,mt7530"; 195 1.1 jmcneill reg = <0>; 196 1.1 jmcneill reset-gpios = <&pio 33 0>; 197 1.1 jmcneill core-supply = <&mt6323_vpa_reg>; 198 1.1 jmcneill io-supply = <&mt6323_vemc3v3_reg>; 199 1.1 jmcneill 200 1.1 jmcneill ports { 201 1.1 jmcneill #address-cells = <1>; 202 1.1 jmcneill #size-cells = <0>; 203 1.1 jmcneill 204 1.1 jmcneill port@0 { 205 1.1 jmcneill reg = <0>; 206 1.1 jmcneill label = "wan"; 207 1.1 jmcneill }; 208 1.1 jmcneill 209 1.1 jmcneill port@1 { 210 1.1 jmcneill reg = <1>; 211 1.1 jmcneill label = "lan0"; 212 1.1 jmcneill }; 213 1.1 jmcneill 214 1.1 jmcneill port@2 { 215 1.1 jmcneill reg = <2>; 216 1.1 jmcneill label = "lan1"; 217 1.1 jmcneill }; 218 1.1 jmcneill 219 1.1 jmcneill port@3 { 220 1.1 jmcneill reg = <3>; 221 1.1 jmcneill label = "lan2"; 222 1.1 jmcneill }; 223 1.1 jmcneill 224 1.1 jmcneill port@4 { 225 1.1 jmcneill reg = <4>; 226 1.1 jmcneill label = "lan3"; 227 1.1 jmcneill }; 228 1.1 jmcneill 229 1.1 jmcneill port@6 { 230 1.1 jmcneill reg = <6>; 231 1.1 jmcneill label = "cpu"; 232 1.1 jmcneill ethernet = <&gmac0>; 233 1.1 jmcneill phy-mode = "trgmii"; 234 1.1 jmcneill 235 1.1 jmcneill fixed-link { 236 1.1 jmcneill speed = <1000>; 237 1.1 jmcneill full-duplex; 238 1.1.1.5 jmcneill pause; 239 1.1 jmcneill }; 240 1.1 jmcneill }; 241 1.1 jmcneill }; 242 1.1 jmcneill }; 243 1.1 jmcneill }; 244 1.1 jmcneill }; 245 1.1 jmcneill 246 1.1.1.5 jmcneill &hdmi0 { 247 1.1.1.5 jmcneill pinctrl-names = "default"; 248 1.1.1.5 jmcneill pinctrl-0 = <&hdmi_pins_a>; 249 1.1.1.5 jmcneill status = "okay"; 250 1.1.1.5 jmcneill 251 1.1.1.5 jmcneill ports { 252 1.1.1.5 jmcneill #address-cells = <1>; 253 1.1.1.5 jmcneill #size-cells = <0>; 254 1.1.1.5 jmcneill port@0 { 255 1.1.1.5 jmcneill reg = <0>; 256 1.1.1.5 jmcneill hdmi0_in: endpoint { 257 1.1.1.5 jmcneill remote-endpoint = <&dpi0_out>; 258 1.1.1.5 jmcneill }; 259 1.1.1.5 jmcneill }; 260 1.1.1.5 jmcneill 261 1.1.1.5 jmcneill port@1 { 262 1.1.1.5 jmcneill reg = <1>; 263 1.1.1.5 jmcneill hdmi0_out: endpoint { 264 1.1.1.5 jmcneill remote-endpoint = <&hdmi_connector_in>; 265 1.1.1.5 jmcneill }; 266 1.1.1.5 jmcneill }; 267 1.1.1.5 jmcneill }; 268 1.1.1.5 jmcneill }; 269 1.1.1.5 jmcneill 270 1.1.1.5 jmcneill &hdmiddc0 { 271 1.1.1.5 jmcneill pinctrl-names = "default"; 272 1.1.1.5 jmcneill pinctrl-0 = <&hdmi_ddc_pins_a>; 273 1.1.1.5 jmcneill status = "okay"; 274 1.1.1.5 jmcneill }; 275 1.1.1.5 jmcneill 276 1.1.1.5 jmcneill &hdmi_phy { 277 1.1.1.5 jmcneill mediatek,ibias = <0xa>; 278 1.1.1.5 jmcneill mediatek,ibias_up = <0x1c>; 279 1.1.1.5 jmcneill status = "okay"; 280 1.1.1.5 jmcneill }; 281 1.1.1.5 jmcneill 282 1.1 jmcneill &i2c0 { 283 1.1 jmcneill pinctrl-names = "default"; 284 1.1 jmcneill pinctrl-0 = <&i2c0_pins_a>; 285 1.1 jmcneill status = "okay"; 286 1.1 jmcneill }; 287 1.1 jmcneill 288 1.1 jmcneill &i2c1 { 289 1.1 jmcneill pinctrl-names = "default"; 290 1.1 jmcneill pinctrl-0 = <&i2c1_pins_a>; 291 1.1 jmcneill status = "okay"; 292 1.1 jmcneill }; 293 1.1 jmcneill 294 1.1.1.5 jmcneill &mali { 295 1.1.1.5 jmcneill mali-supply = <®_vgpu>; 296 1.1.1.5 jmcneill status = "okay"; 297 1.1.1.5 jmcneill }; 298 1.1.1.5 jmcneill 299 1.1 jmcneill &mmc0 { 300 1.1 jmcneill pinctrl-names = "default", "state_uhs"; 301 1.1 jmcneill pinctrl-0 = <&mmc0_pins_default>; 302 1.1 jmcneill pinctrl-1 = <&mmc0_pins_uhs>; 303 1.1 jmcneill status = "okay"; 304 1.1 jmcneill bus-width = <8>; 305 1.1 jmcneill max-frequency = <50000000>; 306 1.1 jmcneill cap-mmc-highspeed; 307 1.1.1.2 jmcneill vmmc-supply = <®_3p3v>; 308 1.1.1.2 jmcneill vqmmc-supply = <®_1p8v>; 309 1.1 jmcneill non-removable; 310 1.1 jmcneill }; 311 1.1 jmcneill 312 1.1 jmcneill &mmc1 { 313 1.1 jmcneill pinctrl-names = "default", "state_uhs"; 314 1.1 jmcneill pinctrl-0 = <&mmc1_pins_default>; 315 1.1 jmcneill pinctrl-1 = <&mmc1_pins_uhs>; 316 1.1 jmcneill status = "okay"; 317 1.1 jmcneill bus-width = <4>; 318 1.1 jmcneill max-frequency = <50000000>; 319 1.1 jmcneill cap-sd-highspeed; 320 1.1.1.2 jmcneill cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>; 321 1.1.1.2 jmcneill vmmc-supply = <®_3p3v>; 322 1.1.1.2 jmcneill vqmmc-supply = <®_3p3v>; 323 1.1.1.2 jmcneill }; 324 1.1.1.2 jmcneill 325 1.1.1.3 jmcneill &mt6323_leds { 326 1.1.1.3 jmcneill status = "okay"; 327 1.1.1.3 jmcneill 328 1.1.1.3 jmcneill led@0 { 329 1.1.1.3 jmcneill reg = <0>; 330 1.1.1.3 jmcneill label = "bpi-r2:isink:green"; 331 1.1.1.3 jmcneill default-state = "off"; 332 1.1.1.3 jmcneill }; 333 1.1.1.3 jmcneill 334 1.1.1.3 jmcneill led@1 { 335 1.1.1.3 jmcneill reg = <1>; 336 1.1.1.3 jmcneill label = "bpi-r2:isink:red"; 337 1.1.1.3 jmcneill default-state = "off"; 338 1.1.1.3 jmcneill }; 339 1.1.1.3 jmcneill 340 1.1.1.3 jmcneill led@2 { 341 1.1.1.3 jmcneill reg = <2>; 342 1.1.1.3 jmcneill label = "bpi-r2:isink:blue"; 343 1.1.1.3 jmcneill default-state = "off"; 344 1.1.1.3 jmcneill }; 345 1.1.1.3 jmcneill }; 346 1.1.1.3 jmcneill 347 1.1.1.2 jmcneill &pcie { 348 1.1.1.2 jmcneill pinctrl-names = "default"; 349 1.1.1.2 jmcneill pinctrl-0 = <&pcie_default>; 350 1.1.1.2 jmcneill status = "okay"; 351 1.1.1.2 jmcneill 352 1.1.1.2 jmcneill pcie@0,0 { 353 1.1.1.2 jmcneill status = "okay"; 354 1.1.1.2 jmcneill }; 355 1.1.1.2 jmcneill 356 1.1.1.2 jmcneill pcie@1,0 { 357 1.1.1.2 jmcneill status = "okay"; 358 1.1.1.2 jmcneill }; 359 1.1.1.2 jmcneill }; 360 1.1.1.2 jmcneill 361 1.1.1.2 jmcneill &pcie0_phy { 362 1.1.1.2 jmcneill status = "okay"; 363 1.1.1.2 jmcneill }; 364 1.1.1.2 jmcneill 365 1.1.1.2 jmcneill &pcie1_phy { 366 1.1.1.2 jmcneill status = "okay"; 367 1.1 jmcneill }; 368 1.1 jmcneill 369 1.1 jmcneill &pwm { 370 1.1 jmcneill pinctrl-names = "default"; 371 1.1 jmcneill pinctrl-0 = <&pwm_pins_a>; 372 1.1 jmcneill status = "okay"; 373 1.1 jmcneill }; 374 1.1 jmcneill 375 1.1 jmcneill &spi0 { 376 1.1 jmcneill pinctrl-names = "default"; 377 1.1 jmcneill pinctrl-0 = <&spi0_pins_a>; 378 1.1 jmcneill status = "okay"; 379 1.1 jmcneill }; 380 1.1 jmcneill 381 1.1 jmcneill &uart0 { 382 1.1 jmcneill pinctrl-names = "default"; 383 1.1 jmcneill pinctrl-0 = <&uart0_pins_a>; 384 1.1.1.2 jmcneill status = "okay"; 385 1.1 jmcneill }; 386 1.1 jmcneill 387 1.1 jmcneill &uart1 { 388 1.1 jmcneill pinctrl-names = "default"; 389 1.1 jmcneill pinctrl-0 = <&uart1_pins_a>; 390 1.1.1.2 jmcneill status = "okay"; 391 1.1 jmcneill }; 392 1.1 jmcneill 393 1.1 jmcneill &uart2 { 394 1.1.1.2 jmcneill pinctrl-names = "default"; 395 1.1.1.2 jmcneill pinctrl-0 = <&uart2_pins_a>; 396 1.1 jmcneill status = "okay"; 397 1.1 jmcneill }; 398 1.1 jmcneill 399 1.1 jmcneill &usb1 { 400 1.1.1.2 jmcneill vusb33-supply = <®_3p3v>; 401 1.1.1.2 jmcneill vbus-supply = <®_5v>; 402 1.1 jmcneill status = "okay"; 403 1.1 jmcneill }; 404 1.1 jmcneill 405 1.1 jmcneill &usb2 { 406 1.1.1.2 jmcneill vusb33-supply = <®_3p3v>; 407 1.1.1.2 jmcneill vbus-supply = <®_5v>; 408 1.1 jmcneill status = "okay"; 409 1.1 jmcneill }; 410 1.1 jmcneill 411 1.1 jmcneill &u3phy1 { 412 1.1 jmcneill status = "okay"; 413 1.1 jmcneill }; 414 1.1 jmcneill 415 1.1 jmcneill &u3phy2 { 416 1.1 jmcneill status = "okay"; 417 1.1 jmcneill }; 418