1 1.1.1.3 skrll // SPDX-License-Identifier: GPL-2.0-only 2 1.1 jmcneill /* 3 1.1 jmcneill * Copyright (C) 2014 Joachim Eastwood <manabian (a] gmail.com> 4 1.1 jmcneill */ 5 1.1 jmcneill 6 1.1 jmcneill / { 7 1.1 jmcneill /* regulator for wl12xx on sdio4 */ 8 1.1 jmcneill wl12xx_vmmc: wl12xx_vmmc { 9 1.1 jmcneill pinctrl-names = "default"; 10 1.1 jmcneill pinctrl-0 = <&wl12xx_ctrl_pins>; 11 1.1 jmcneill compatible = "regulator-fixed"; 12 1.1 jmcneill regulator-name = "vwl1271"; 13 1.1 jmcneill regulator-min-microvolt = <1800000>; 14 1.1 jmcneill regulator-max-microvolt = <1800000>; 15 1.1 jmcneill gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; /* gpio 43 */ 16 1.1 jmcneill startup-delay-us = <70000>; 17 1.1 jmcneill enable-active-high; 18 1.1 jmcneill }; 19 1.1 jmcneill }; 20 1.1 jmcneill 21 1.1 jmcneill &omap4_pmx_core { 22 1.1 jmcneill uart2_pins: pinmux_uart2_pins { 23 1.1 jmcneill pinctrl-single,pins = < 24 1.1 jmcneill OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */ 25 1.1 jmcneill OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */ 26 1.1 jmcneill OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */ 27 1.1 jmcneill OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ 28 1.1 jmcneill >; 29 1.1 jmcneill }; 30 1.1 jmcneill 31 1.1 jmcneill wl12xx_ctrl_pins: pinmux_wl12xx_ctrl_pins { 32 1.1 jmcneill pinctrl-single,pins = < 33 1.1 jmcneill OMAP4_IOPAD(0x062, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a17.gpio_41 (WLAN_IRQ) */ 34 1.1 jmcneill OMAP4_IOPAD(0x064, PIN_OUTPUT | MUX_MODE3) /* gpmc_a18.gpio_42 (BT_EN) */ 35 1.1 jmcneill OMAP4_IOPAD(0x066, PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 (WLAN_EN) */ 36 1.1 jmcneill >; 37 1.1 jmcneill }; 38 1.1 jmcneill 39 1.1 jmcneill mmc4_pins: pinmux_mmc4_pins { 40 1.1 jmcneill pinctrl-single,pins = < 41 1.1 jmcneill OMAP4_IOPAD(0x154, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi4_clk.sdmmc4_clk */ 42 1.1 jmcneill OMAP4_IOPAD(0x156, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi4_simo.sdmmc4_cmd */ 43 1.1 jmcneill OMAP4_IOPAD(0x158, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi4_somi.sdmmc4_dat0 */ 44 1.1 jmcneill OMAP4_IOPAD(0x15e, PIN_INPUT_PULLUP | MUX_MODE1) /* uart4_tx.sdmmc4_dat1 */ 45 1.1 jmcneill OMAP4_IOPAD(0x15c, PIN_INPUT_PULLUP | MUX_MODE1) /* uart4_rx.sdmmc4_dat2 */ 46 1.1 jmcneill OMAP4_IOPAD(0x15a, PIN_INPUT_PULLUP | MUX_MODE1) /* mcspi4_cs0.sdmmc4_dat3 */ 47 1.1 jmcneill >; 48 1.1 jmcneill }; 49 1.1 jmcneill }; 50 1.1 jmcneill 51 1.1 jmcneill &uart2 { 52 1.1 jmcneill pinctrl-names = "default"; 53 1.1 jmcneill pinctrl-0 = <&uart2_pins>; 54 1.1 jmcneill status = "okay"; 55 1.1 jmcneill }; 56 1.1 jmcneill 57 1.1 jmcneill &mmc4 { 58 1.1 jmcneill pinctrl-names = "default"; 59 1.1 jmcneill pinctrl-0 = <&mmc4_pins>; 60 1.1 jmcneill vmmc-supply = <&wl12xx_vmmc>; 61 1.1 jmcneill non-removable; 62 1.1 jmcneill bus-width = <4>; 63 1.1 jmcneill cap-power-off-card; 64 1.1 jmcneill status = "okay"; 65 1.1 jmcneill 66 1.1 jmcneill #address-cells = <1>; 67 1.1 jmcneill #size-cells = <0>; 68 1.1 jmcneill wlcore: wlcore@2 { 69 1.1 jmcneill compatible = "ti,wl1271"; 70 1.1 jmcneill reg = <2>; 71 1.1 jmcneill interrupt-parent = <&gpio2>; 72 1.1.1.3 skrll interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; /* gpio 41 */ 73 1.1 jmcneill ref-clock-frequency = <38400000>; 74 1.1 jmcneill }; 75 1.1 jmcneill }; 76
Indexes created Mon Oct 13 16:09:52 GMT 2025