1 1.1.1.4 jmcneill // SPDX-License-Identifier: GPL-2.0+ OR MIT 2 1.1.1.4 jmcneill // 3 1.1.1.4 jmcneill // Device Tree Source for UniPhier Pro4 Ace Board 4 1.1.1.4 jmcneill // 5 1.1.1.4 jmcneill // Copyright (C) 2016 Socionext Inc. 6 1.1.1.4 jmcneill // Author: Masahiro Yamada <yamada.masahiro (a] socionext.com> 7 1.1 jmcneill 8 1.1 jmcneill /dts-v1/; 9 1.1.1.3 jmcneill #include "uniphier-pro4.dtsi" 10 1.1 jmcneill 11 1.1 jmcneill / { 12 1.1 jmcneill model = "UniPhier Pro4 Ace Board"; 13 1.1 jmcneill compatible = "socionext,uniphier-pro4-ace", "socionext,uniphier-pro4"; 14 1.1 jmcneill 15 1.1 jmcneill chosen { 16 1.1 jmcneill stdout-path = "serial0:115200n8"; 17 1.1 jmcneill }; 18 1.1 jmcneill 19 1.1 jmcneill aliases { 20 1.1 jmcneill serial0 = &serial0; 21 1.1 jmcneill serial1 = &serial1; 22 1.1 jmcneill serial2 = &serial2; 23 1.1 jmcneill i2c0 = &i2c0; 24 1.1 jmcneill i2c1 = &i2c1; 25 1.1 jmcneill i2c2 = &i2c2; 26 1.1 jmcneill i2c3 = &i2c3; 27 1.1 jmcneill i2c5 = &i2c5; 28 1.1 jmcneill i2c6 = &i2c6; 29 1.1.1.6 jmcneill ethernet0 = ð 30 1.1 jmcneill }; 31 1.1.1.2 jmcneill 32 1.1.1.2 jmcneill memory@80000000 { 33 1.1.1.2 jmcneill device_type = "memory"; 34 1.1.1.2 jmcneill reg = <0x80000000 0x40000000>; 35 1.1.1.2 jmcneill }; 36 1.1 jmcneill }; 37 1.1 jmcneill 38 1.1 jmcneill &serial0 { 39 1.1 jmcneill status = "okay"; 40 1.1 jmcneill }; 41 1.1 jmcneill 42 1.1 jmcneill &serial1 { 43 1.1 jmcneill status = "okay"; 44 1.1 jmcneill }; 45 1.1 jmcneill 46 1.1 jmcneill &serial2 { 47 1.1 jmcneill status = "okay"; 48 1.1 jmcneill }; 49 1.1 jmcneill 50 1.1 jmcneill &i2c0 { 51 1.1 jmcneill status = "okay"; 52 1.1 jmcneill 53 1.1 jmcneill eeprom@54 { 54 1.1.1.3 jmcneill compatible = "st,24c64", "atmel,24c64"; 55 1.1 jmcneill reg = <0x54>; 56 1.1.1.2 jmcneill pagesize = <32>; 57 1.1 jmcneill }; 58 1.1 jmcneill }; 59 1.1 jmcneill 60 1.1 jmcneill &i2c1 { 61 1.1 jmcneill status = "okay"; 62 1.1 jmcneill }; 63 1.1 jmcneill 64 1.1 jmcneill &i2c2 { 65 1.1 jmcneill status = "okay"; 66 1.1 jmcneill }; 67 1.1 jmcneill 68 1.1 jmcneill &i2c3 { 69 1.1 jmcneill status = "okay"; 70 1.1 jmcneill }; 71 1.1 jmcneill 72 1.1.1.5 jmcneill &sd { 73 1.1.1.5 jmcneill status = "okay"; 74 1.1.1.5 jmcneill }; 75 1.1.1.5 jmcneill 76 1.1 jmcneill &usb2 { 77 1.1 jmcneill status = "okay"; 78 1.1 jmcneill }; 79 1.1 jmcneill 80 1.1 jmcneill &usb3 { 81 1.1 jmcneill status = "okay"; 82 1.1 jmcneill }; 83 1.1.1.4 jmcneill 84 1.1.1.4 jmcneill ð { 85 1.1.1.4 jmcneill status = "okay"; 86 1.1.1.4 jmcneill phy-handle = <ðphy>; 87 1.1.1.4 jmcneill }; 88 1.1.1.4 jmcneill 89 1.1.1.4 jmcneill &mdio { 90 1.1.1.6 jmcneill ethphy: ethernet-phy@1 { 91 1.1.1.4 jmcneill reg = <1>; 92 1.1.1.4 jmcneill }; 93 1.1.1.4 jmcneill }; 94 1.1.1.5 jmcneill 95 1.1.1.5 jmcneill &usb0 { 96 1.1.1.5 jmcneill status = "okay"; 97 1.1.1.5 jmcneill }; 98 1.1.1.5 jmcneill 99 1.1.1.5 jmcneill &usb1 { 100 1.1.1.5 jmcneill status = "okay"; 101 1.1.1.5 jmcneill }; 102