11.1Sjmcneill/* $NetBSD: alphascale,asm9260.h,v 1.1.1.2 2020/01/03 14:33:04 skrll Exp $ */ 21.1Sjmcneill 31.1.1.2Sskrll/* SPDX-License-Identifier: GPL-2.0-only */ 41.1Sjmcneill/* 51.1Sjmcneill * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de> 61.1Sjmcneill */ 71.1Sjmcneill 81.1Sjmcneill#ifndef _DT_BINDINGS_CLK_ASM9260_H 91.1Sjmcneill#define _DT_BINDINGS_CLK_ASM9260_H 101.1Sjmcneill 111.1Sjmcneill/* ahb gate */ 121.1Sjmcneill#define CLKID_AHB_ROM 0 131.1Sjmcneill#define CLKID_AHB_RAM 1 141.1Sjmcneill#define CLKID_AHB_GPIO 2 151.1Sjmcneill#define CLKID_AHB_MAC 3 161.1Sjmcneill#define CLKID_AHB_EMI 4 171.1Sjmcneill#define CLKID_AHB_USB0 5 181.1Sjmcneill#define CLKID_AHB_USB1 6 191.1Sjmcneill#define CLKID_AHB_DMA0 7 201.1Sjmcneill#define CLKID_AHB_DMA1 8 211.1Sjmcneill#define CLKID_AHB_UART0 9 221.1Sjmcneill#define CLKID_AHB_UART1 10 231.1Sjmcneill#define CLKID_AHB_UART2 11 241.1Sjmcneill#define CLKID_AHB_UART3 12 251.1Sjmcneill#define CLKID_AHB_UART4 13 261.1Sjmcneill#define CLKID_AHB_UART5 14 271.1Sjmcneill#define CLKID_AHB_UART6 15 281.1Sjmcneill#define CLKID_AHB_UART7 16 291.1Sjmcneill#define CLKID_AHB_UART8 17 301.1Sjmcneill#define CLKID_AHB_UART9 18 311.1Sjmcneill#define CLKID_AHB_I2S0 19 321.1Sjmcneill#define CLKID_AHB_I2C0 20 331.1Sjmcneill#define CLKID_AHB_I2C1 21 341.1Sjmcneill#define CLKID_AHB_SSP0 22 351.1Sjmcneill#define CLKID_AHB_IOCONFIG 23 361.1Sjmcneill#define CLKID_AHB_WDT 24 371.1Sjmcneill#define CLKID_AHB_CAN0 25 381.1Sjmcneill#define CLKID_AHB_CAN1 26 391.1Sjmcneill#define CLKID_AHB_MPWM 27 401.1Sjmcneill#define CLKID_AHB_SPI0 28 411.1Sjmcneill#define CLKID_AHB_SPI1 29 421.1Sjmcneill#define CLKID_AHB_QEI 30 431.1Sjmcneill#define CLKID_AHB_QUADSPI0 31 441.1Sjmcneill#define CLKID_AHB_CAMIF 32 451.1Sjmcneill#define CLKID_AHB_LCDIF 33 461.1Sjmcneill#define CLKID_AHB_TIMER0 34 471.1Sjmcneill#define CLKID_AHB_TIMER1 35 481.1Sjmcneill#define CLKID_AHB_TIMER2 36 491.1Sjmcneill#define CLKID_AHB_TIMER3 37 501.1Sjmcneill#define CLKID_AHB_IRQ 38 511.1Sjmcneill#define CLKID_AHB_RTC 39 521.1Sjmcneill#define CLKID_AHB_NAND 40 531.1Sjmcneill#define CLKID_AHB_ADC0 41 541.1Sjmcneill#define CLKID_AHB_LED 42 551.1Sjmcneill#define CLKID_AHB_DAC0 43 561.1Sjmcneill#define CLKID_AHB_LCD 44 571.1Sjmcneill#define CLKID_AHB_I2S1 45 581.1Sjmcneill#define CLKID_AHB_MAC1 46 591.1Sjmcneill 601.1Sjmcneill/* devider */ 611.1Sjmcneill#define CLKID_SYS_CPU 47 621.1Sjmcneill#define CLKID_SYS_AHB 48 631.1Sjmcneill#define CLKID_SYS_I2S0M 49 641.1Sjmcneill#define CLKID_SYS_I2S0S 50 651.1Sjmcneill#define CLKID_SYS_I2S1M 51 661.1Sjmcneill#define CLKID_SYS_I2S1S 52 671.1Sjmcneill#define CLKID_SYS_UART0 53 681.1Sjmcneill#define CLKID_SYS_UART1 54 691.1Sjmcneill#define CLKID_SYS_UART2 55 701.1Sjmcneill#define CLKID_SYS_UART3 56 711.1Sjmcneill#define CLKID_SYS_UART4 56 721.1Sjmcneill#define CLKID_SYS_UART5 57 731.1Sjmcneill#define CLKID_SYS_UART6 58 741.1Sjmcneill#define CLKID_SYS_UART7 59 751.1Sjmcneill#define CLKID_SYS_UART8 60 761.1Sjmcneill#define CLKID_SYS_UART9 61 771.1Sjmcneill#define CLKID_SYS_SPI0 62 781.1Sjmcneill#define CLKID_SYS_SPI1 63 791.1Sjmcneill#define CLKID_SYS_QUADSPI 64 801.1Sjmcneill#define CLKID_SYS_SSP0 65 811.1Sjmcneill#define CLKID_SYS_NAND 66 821.1Sjmcneill#define CLKID_SYS_TRACE 67 831.1Sjmcneill#define CLKID_SYS_CAMM 68 841.1Sjmcneill#define CLKID_SYS_WDT 69 851.1Sjmcneill#define CLKID_SYS_CLKOUT 70 861.1Sjmcneill#define CLKID_SYS_MAC 71 871.1Sjmcneill#define CLKID_SYS_LCD 72 881.1Sjmcneill#define CLKID_SYS_ADCANA 73 891.1Sjmcneill 901.1Sjmcneill#define MAX_CLKS 74 911.1Sjmcneill#endif 92