1 1.1 jmcneill /* $NetBSD: alphascale,asm9260.h,v 1.1.1.2 2020/01/03 14:33:04 skrll Exp $ */ 2 1.1 jmcneill 3 1.1.1.2 skrll /* SPDX-License-Identifier: GPL-2.0-only */ 4 1.1 jmcneill /* 5 1.1 jmcneill * Copyright 2014 Oleksij Rempel <linux (at) rempel-privat.de> 6 1.1 jmcneill */ 7 1.1 jmcneill 8 1.1 jmcneill #ifndef _DT_BINDINGS_CLK_ASM9260_H 9 1.1 jmcneill #define _DT_BINDINGS_CLK_ASM9260_H 10 1.1 jmcneill 11 1.1 jmcneill /* ahb gate */ 12 1.1 jmcneill #define CLKID_AHB_ROM 0 13 1.1 jmcneill #define CLKID_AHB_RAM 1 14 1.1 jmcneill #define CLKID_AHB_GPIO 2 15 1.1 jmcneill #define CLKID_AHB_MAC 3 16 1.1 jmcneill #define CLKID_AHB_EMI 4 17 1.1 jmcneill #define CLKID_AHB_USB0 5 18 1.1 jmcneill #define CLKID_AHB_USB1 6 19 1.1 jmcneill #define CLKID_AHB_DMA0 7 20 1.1 jmcneill #define CLKID_AHB_DMA1 8 21 1.1 jmcneill #define CLKID_AHB_UART0 9 22 1.1 jmcneill #define CLKID_AHB_UART1 10 23 1.1 jmcneill #define CLKID_AHB_UART2 11 24 1.1 jmcneill #define CLKID_AHB_UART3 12 25 1.1 jmcneill #define CLKID_AHB_UART4 13 26 1.1 jmcneill #define CLKID_AHB_UART5 14 27 1.1 jmcneill #define CLKID_AHB_UART6 15 28 1.1 jmcneill #define CLKID_AHB_UART7 16 29 1.1 jmcneill #define CLKID_AHB_UART8 17 30 1.1 jmcneill #define CLKID_AHB_UART9 18 31 1.1 jmcneill #define CLKID_AHB_I2S0 19 32 1.1 jmcneill #define CLKID_AHB_I2C0 20 33 1.1 jmcneill #define CLKID_AHB_I2C1 21 34 1.1 jmcneill #define CLKID_AHB_SSP0 22 35 1.1 jmcneill #define CLKID_AHB_IOCONFIG 23 36 1.1 jmcneill #define CLKID_AHB_WDT 24 37 1.1 jmcneill #define CLKID_AHB_CAN0 25 38 1.1 jmcneill #define CLKID_AHB_CAN1 26 39 1.1 jmcneill #define CLKID_AHB_MPWM 27 40 1.1 jmcneill #define CLKID_AHB_SPI0 28 41 1.1 jmcneill #define CLKID_AHB_SPI1 29 42 1.1 jmcneill #define CLKID_AHB_QEI 30 43 1.1 jmcneill #define CLKID_AHB_QUADSPI0 31 44 1.1 jmcneill #define CLKID_AHB_CAMIF 32 45 1.1 jmcneill #define CLKID_AHB_LCDIF 33 46 1.1 jmcneill #define CLKID_AHB_TIMER0 34 47 1.1 jmcneill #define CLKID_AHB_TIMER1 35 48 1.1 jmcneill #define CLKID_AHB_TIMER2 36 49 1.1 jmcneill #define CLKID_AHB_TIMER3 37 50 1.1 jmcneill #define CLKID_AHB_IRQ 38 51 1.1 jmcneill #define CLKID_AHB_RTC 39 52 1.1 jmcneill #define CLKID_AHB_NAND 40 53 1.1 jmcneill #define CLKID_AHB_ADC0 41 54 1.1 jmcneill #define CLKID_AHB_LED 42 55 1.1 jmcneill #define CLKID_AHB_DAC0 43 56 1.1 jmcneill #define CLKID_AHB_LCD 44 57 1.1 jmcneill #define CLKID_AHB_I2S1 45 58 1.1 jmcneill #define CLKID_AHB_MAC1 46 59 1.1 jmcneill 60 1.1 jmcneill /* devider */ 61 1.1 jmcneill #define CLKID_SYS_CPU 47 62 1.1 jmcneill #define CLKID_SYS_AHB 48 63 1.1 jmcneill #define CLKID_SYS_I2S0M 49 64 1.1 jmcneill #define CLKID_SYS_I2S0S 50 65 1.1 jmcneill #define CLKID_SYS_I2S1M 51 66 1.1 jmcneill #define CLKID_SYS_I2S1S 52 67 1.1 jmcneill #define CLKID_SYS_UART0 53 68 1.1 jmcneill #define CLKID_SYS_UART1 54 69 1.1 jmcneill #define CLKID_SYS_UART2 55 70 1.1 jmcneill #define CLKID_SYS_UART3 56 71 1.1 jmcneill #define CLKID_SYS_UART4 56 72 1.1 jmcneill #define CLKID_SYS_UART5 57 73 1.1 jmcneill #define CLKID_SYS_UART6 58 74 1.1 jmcneill #define CLKID_SYS_UART7 59 75 1.1 jmcneill #define CLKID_SYS_UART8 60 76 1.1 jmcneill #define CLKID_SYS_UART9 61 77 1.1 jmcneill #define CLKID_SYS_SPI0 62 78 1.1 jmcneill #define CLKID_SYS_SPI1 63 79 1.1 jmcneill #define CLKID_SYS_QUADSPI 64 80 1.1 jmcneill #define CLKID_SYS_SSP0 65 81 1.1 jmcneill #define CLKID_SYS_NAND 66 82 1.1 jmcneill #define CLKID_SYS_TRACE 67 83 1.1 jmcneill #define CLKID_SYS_CAMM 68 84 1.1 jmcneill #define CLKID_SYS_WDT 69 85 1.1 jmcneill #define CLKID_SYS_CLKOUT 70 86 1.1 jmcneill #define CLKID_SYS_MAC 71 87 1.1 jmcneill #define CLKID_SYS_LCD 72 88 1.1 jmcneill #define CLKID_SYS_ADCANA 73 89 1.1 jmcneill 90 1.1 jmcneill #define MAX_CLKS 74 91 1.1 jmcneill #endif 92