amlogic,a1-peripherals-clkc.h revision 1.1.1.1 
1/*	$NetBSD: amlogic,a1-peripherals-clkc.h,v 1.1.1.1 2026/01/18 05:21:28 skrll Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
4/*
5 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
6 * Author: Jian Hu <jian.hu@amlogic.com>
7 *
8 * Copyright (c) 2023, SberDevices. All Rights Reserved.
9 * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
10 */
11
12#ifndef __A1_PERIPHERALS_CLKC_H
13#define __A1_PERIPHERALS_CLKC_H
14
15#define CLKID_XTAL_IN		0
16#define CLKID_FIXPLL_IN		1
17#define CLKID_USB_PHY_IN	2
18#define CLKID_USB_CTRL_IN	3
19#define CLKID_HIFIPLL_IN	4
20#define CLKID_SYSPLL_IN		5
21#define CLKID_DDS_IN		6
22#define CLKID_SYS		7
23#define CLKID_CLKTREE		8
24#define CLKID_RESET_CTRL	9
25#define CLKID_ANALOG_CTRL	10
26#define CLKID_PWR_CTRL		11
27#define CLKID_PAD_CTRL		12
28#define CLKID_SYS_CTRL		13
29#define CLKID_TEMP_SENSOR	14
30#define CLKID_AM2AXI_DIV	15
31#define CLKID_SPICC_B		16
32#define CLKID_SPICC_A		17
33#define CLKID_MSR		18
34#define CLKID_AUDIO		19
35#define CLKID_JTAG_CTRL		20
36#define CLKID_SARADC_EN		21
37#define CLKID_PWM_EF		22
38#define CLKID_PWM_CD		23
39#define CLKID_PWM_AB		24
40#define CLKID_CEC		25
41#define CLKID_I2C_S		26
42#define CLKID_IR_CTRL		27
43#define CLKID_I2C_M_D		28
44#define CLKID_I2C_M_C		29
45#define CLKID_I2C_M_B		30
46#define CLKID_I2C_M_A		31
47#define CLKID_ACODEC		32
48#define CLKID_OTP		33
49#define CLKID_SD_EMMC_A		34
50#define CLKID_USB_PHY		35
51#define CLKID_USB_CTRL		36
52#define CLKID_SYS_DSPB		37
53#define CLKID_SYS_DSPA		38
54#define CLKID_DMA		39
55#define CLKID_IRQ_CTRL		40
56#define CLKID_NIC		41
57#define CLKID_GIC		42
58#define CLKID_UART_C		43
59#define CLKID_UART_B		44
60#define CLKID_UART_A		45
61#define CLKID_SYS_PSRAM		46
62#define CLKID_RSA		47
63#define CLKID_CORESIGHT		48
64#define CLKID_AM2AXI_VAD	49
65#define CLKID_AUDIO_VAD		50
66#define CLKID_AXI_DMC		51
67#define CLKID_AXI_PSRAM		52
68#define CLKID_RAMB		53
69#define CLKID_RAMA		54
70#define CLKID_AXI_SPIFC		55
71#define CLKID_AXI_NIC		56
72#define CLKID_AXI_DMA		57
73#define CLKID_CPU_CTRL		58
74#define CLKID_ROM		59
75#define CLKID_PROC_I2C		60
76#define CLKID_DSPA_SEL		61
77#define CLKID_DSPB_SEL		62
78#define CLKID_DSPA_EN		63
79#define CLKID_DSPA_EN_NIC	64
80#define CLKID_DSPB_EN		65
81#define CLKID_DSPB_EN_NIC	66
82#define CLKID_RTC		67
83#define CLKID_CECA_32K		68
84#define CLKID_CECB_32K		69
85#define CLKID_24M		70
86#define CLKID_12M		71
87#define CLKID_FCLK_DIV2_DIVN	72
88#define CLKID_GEN		73
89#define CLKID_SARADC_SEL	74
90#define CLKID_SARADC		75
91#define CLKID_PWM_A		76
92#define CLKID_PWM_B		77
93#define CLKID_PWM_C		78
94#define CLKID_PWM_D		79
95#define CLKID_PWM_E		80
96#define CLKID_PWM_F		81
97#define CLKID_SPICC		82
98#define CLKID_TS		83
99#define CLKID_SPIFC		84
100#define CLKID_USB_BUS		85
101#define CLKID_SD_EMMC		86
102#define CLKID_PSRAM		87
103#define CLKID_DMC		88
104#define CLKID_SYS_A_SEL		89
105#define CLKID_SYS_A_DIV		90
106#define CLKID_SYS_A		91
107#define CLKID_SYS_B_SEL		92
108#define CLKID_SYS_B_DIV		93
109#define CLKID_SYS_B		94
110#define CLKID_DSPA_A_SEL	95
111#define CLKID_DSPA_A_DIV	96
112#define CLKID_DSPA_A		97
113#define CLKID_DSPA_B_SEL	98
114#define CLKID_DSPA_B_DIV	99
115#define CLKID_DSPA_B		100
116#define CLKID_DSPB_A_SEL	101
117#define CLKID_DSPB_A_DIV	102
118#define CLKID_DSPB_A		103
119#define CLKID_DSPB_B_SEL	104
120#define CLKID_DSPB_B_DIV	105
121#define CLKID_DSPB_B		106
122#define CLKID_RTC_32K_IN	107
123#define CLKID_RTC_32K_DIV	108
124#define CLKID_RTC_32K_XTAL	109
125#define CLKID_RTC_32K_SEL	110
126#define CLKID_CECB_32K_IN	111
127#define CLKID_CECB_32K_DIV	112
128#define CLKID_CECB_32K_SEL_PRE	113
129#define CLKID_CECB_32K_SEL	114
130#define CLKID_CECA_32K_IN	115
131#define CLKID_CECA_32K_DIV	116
132#define CLKID_CECA_32K_SEL_PRE	117
133#define CLKID_CECA_32K_SEL	118
134#define CLKID_DIV2_PRE		119
135#define CLKID_24M_DIV2		120
136#define CLKID_GEN_SEL		121
137#define CLKID_GEN_DIV		122
138#define CLKID_SARADC_DIV	123
139#define CLKID_PWM_A_SEL		124
140#define CLKID_PWM_A_DIV		125
141#define CLKID_PWM_B_SEL		126
142#define CLKID_PWM_B_DIV		127
143#define CLKID_PWM_C_SEL		128
144#define CLKID_PWM_C_DIV		129
145#define CLKID_PWM_D_SEL		130
146#define CLKID_PWM_D_DIV		131
147#define CLKID_PWM_E_SEL		132
148#define CLKID_PWM_E_DIV		133
149#define CLKID_PWM_F_SEL		134
150#define CLKID_PWM_F_DIV		135
151#define CLKID_SPICC_SEL		136
152#define CLKID_SPICC_DIV		137
153#define CLKID_SPICC_SEL2	138
154#define CLKID_TS_DIV		139
155#define CLKID_SPIFC_SEL		140
156#define CLKID_SPIFC_DIV		141
157#define CLKID_SPIFC_SEL2	142
158#define CLKID_USB_BUS_SEL	143
159#define CLKID_USB_BUS_DIV	144
160#define CLKID_SD_EMMC_SEL	145
161#define CLKID_SD_EMMC_DIV	146
162#define CLKID_SD_EMMC_SEL2	147
163#define CLKID_PSRAM_SEL		148
164#define CLKID_PSRAM_DIV		149
165#define CLKID_PSRAM_SEL2	150
166#define CLKID_DMC_SEL		151
167#define CLKID_DMC_DIV		152
168#define CLKID_DMC_SEL2		153
169#define CLKID_SYS_PLL_DIV16	154
170
171#endif /* __A1_PERIPHERALS_CLKC_H */
172