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      1      1.1  jmcneill /*	$NetBSD: axg-aoclkc.h,v 1.1.1.2 2019/05/25 11:29:13 jmcneill Exp $	*/
      2      1.1  jmcneill 
      3      1.1  jmcneill /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
      4      1.1  jmcneill /*
      5      1.1  jmcneill  * Copyright (c) 2016 BayLibre, SAS
      6      1.1  jmcneill  * Author: Neil Armstrong <narmstrong (at) baylibre.com>
      7      1.1  jmcneill  *
      8      1.1  jmcneill  * Copyright (c) 2018 Amlogic, inc.
      9      1.1  jmcneill  * Author: Qiufang Dai <qiufang.dai (at) amlogic.com>
     10      1.1  jmcneill  */
     11      1.1  jmcneill 
     12      1.1  jmcneill #ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK
     13      1.1  jmcneill #define DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK
     14      1.1  jmcneill 
     15      1.1  jmcneill #define CLKID_AO_REMOTE		0
     16      1.1  jmcneill #define CLKID_AO_I2C_MASTER	1
     17      1.1  jmcneill #define CLKID_AO_I2C_SLAVE	2
     18      1.1  jmcneill #define CLKID_AO_UART1		3
     19      1.1  jmcneill #define CLKID_AO_UART2		4
     20      1.1  jmcneill #define CLKID_AO_IR_BLASTER	5
     21      1.1  jmcneill #define CLKID_AO_SAR_ADC	6
     22      1.1  jmcneill #define CLKID_AO_CLK81		7
     23      1.1  jmcneill #define CLKID_AO_SAR_ADC_SEL	8
     24      1.1  jmcneill #define CLKID_AO_SAR_ADC_DIV	9
     25      1.1  jmcneill #define CLKID_AO_SAR_ADC_CLK	10
     26  1.1.1.2  jmcneill #define CLKID_AO_CTS_OSCIN	11
     27  1.1.1.2  jmcneill #define CLKID_AO_32K_PRE	12
     28  1.1.1.2  jmcneill #define CLKID_AO_32K_DIV	13
     29  1.1.1.2  jmcneill #define CLKID_AO_32K_SEL	14
     30  1.1.1.2  jmcneill #define CLKID_AO_32K		15
     31  1.1.1.2  jmcneill #define CLKID_AO_CTS_RTC_OSCIN	16
     32      1.1  jmcneill 
     33      1.1  jmcneill #endif
     34