axis,artpec6-clkctrl.h revision 1.1.1.2 
1/*	$NetBSD: axis,artpec6-clkctrl.h,v 1.1.1.2 2020/01/03 14:33:05 skrll Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0-only */
4/*
5 * ARTPEC-6 clock controller indexes
6 *
7 * Copyright 2016 Axis Comunications AB.
8 */
9
10#ifndef DT_BINDINGS_CLK_ARTPEC6_CLKCTRL_H
11#define DT_BINDINGS_CLK_ARTPEC6_CLKCTRL_H
12
13#define ARTPEC6_CLK_CPU			0
14#define ARTPEC6_CLK_CPU_PERIPH		1
15#define ARTPEC6_CLK_NAND_CLKA		2
16#define ARTPEC6_CLK_NAND_CLKB		3
17#define ARTPEC6_CLK_ETH_ACLK		4
18#define ARTPEC6_CLK_DMA_ACLK		5
19#define ARTPEC6_CLK_PTP_REF		6
20#define ARTPEC6_CLK_SD_PCLK		7
21#define ARTPEC6_CLK_SD_IMCLK		8
22#define ARTPEC6_CLK_I2S_HST		9
23#define ARTPEC6_CLK_I2S0_CLK		10
24#define ARTPEC6_CLK_I2S1_CLK		11
25#define ARTPEC6_CLK_UART_PCLK		12
26#define ARTPEC6_CLK_UART_REFCLK		13
27#define ARTPEC6_CLK_I2C			14
28#define ARTPEC6_CLK_SPI_PCLK		15
29#define ARTPEC6_CLK_SPI_SSPCLK		16
30#define ARTPEC6_CLK_SYS_TIMER		17
31#define ARTPEC6_CLK_FRACDIV_IN		18
32#define ARTPEC6_CLK_DBG_PCLK		19
33
34/* This must be the highest clock index plus one. */
35#define ARTPEC6_CLK_NUMCLOCKS		20
36
37#endif
38