1 1.1 jmcneill /* $NetBSD: bcm6362-clock.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /* SPDX-License-Identifier: GPL-2.0+ */ 4 1.1 jmcneill 5 1.1 jmcneill #ifndef __DT_BINDINGS_CLOCK_BCM6362_H 6 1.1 jmcneill #define __DT_BINDINGS_CLOCK_BCM6362_H 7 1.1 jmcneill 8 1.1 jmcneill #define BCM6362_CLK_ADSL_QPROC 1 9 1.1 jmcneill #define BCM6362_CLK_ADSL_AFE 2 10 1.1 jmcneill #define BCM6362_CLK_ADSL 3 11 1.1 jmcneill #define BCM6362_CLK_MIPS 4 12 1.1 jmcneill #define BCM6362_CLK_WLAN_OCP 5 13 1.1 jmcneill #define BCM6362_CLK_SWPKT_USB 7 14 1.1 jmcneill #define BCM6362_CLK_SWPKT_SAR 8 15 1.1 jmcneill #define BCM6362_CLK_SAR 9 16 1.1 jmcneill #define BCM6362_CLK_ROBOSW 10 17 1.1 jmcneill #define BCM6362_CLK_PCM 11 18 1.1 jmcneill #define BCM6362_CLK_USBD 12 19 1.1 jmcneill #define BCM6362_CLK_USBH 13 20 1.1 jmcneill #define BCM6362_CLK_IPSEC 14 21 1.1 jmcneill #define BCM6362_CLK_SPI 15 22 1.1 jmcneill #define BCM6362_CLK_HSSPI 16 23 1.1 jmcneill #define BCM6362_CLK_PCIE 17 24 1.1 jmcneill #define BCM6362_CLK_FAP 18 25 1.1 jmcneill #define BCM6362_CLK_PHYMIPS 19 26 1.1 jmcneill #define BCM6362_CLK_NAND 20 27 1.1 jmcneill 28 1.1 jmcneill #endif /* __DT_BINDINGS_CLOCK_BCM6362_H */ 29