Home | History | Annotate | Line # | Download | only in clock
      1      1.1  jmcneill /*	$NetBSD: imx6sl-clock.h,v 1.1.1.3 2020/01/03 14:33:05 skrll Exp $	*/
      2      1.1  jmcneill 
      3  1.1.1.3     skrll /* SPDX-License-Identifier: GPL-2.0-only */
      4      1.1  jmcneill /*
      5      1.1  jmcneill  * Copyright 2013 Freescale Semiconductor, Inc.
      6      1.1  jmcneill  */
      7      1.1  jmcneill 
      8      1.1  jmcneill #ifndef __DT_BINDINGS_CLOCK_IMX6SL_H
      9      1.1  jmcneill #define __DT_BINDINGS_CLOCK_IMX6SL_H
     10      1.1  jmcneill 
     11      1.1  jmcneill #define IMX6SL_CLK_DUMMY		0
     12      1.1  jmcneill #define IMX6SL_CLK_CKIL			1
     13      1.1  jmcneill #define IMX6SL_CLK_OSC			2
     14      1.1  jmcneill #define IMX6SL_CLK_PLL1_SYS		3
     15      1.1  jmcneill #define IMX6SL_CLK_PLL2_BUS		4
     16      1.1  jmcneill #define IMX6SL_CLK_PLL3_USB_OTG		5
     17      1.1  jmcneill #define IMX6SL_CLK_PLL4_AUDIO		6
     18      1.1  jmcneill #define IMX6SL_CLK_PLL5_VIDEO		7
     19      1.1  jmcneill #define IMX6SL_CLK_PLL6_ENET		8
     20      1.1  jmcneill #define IMX6SL_CLK_PLL7_USB_HOST	9
     21      1.1  jmcneill #define IMX6SL_CLK_USBPHY1		10
     22      1.1  jmcneill #define IMX6SL_CLK_USBPHY2		11
     23      1.1  jmcneill #define IMX6SL_CLK_USBPHY1_GATE		12
     24      1.1  jmcneill #define IMX6SL_CLK_USBPHY2_GATE		13
     25      1.1  jmcneill #define IMX6SL_CLK_PLL4_POST_DIV	14
     26      1.1  jmcneill #define IMX6SL_CLK_PLL5_POST_DIV	15
     27      1.1  jmcneill #define IMX6SL_CLK_PLL5_VIDEO_DIV	16
     28      1.1  jmcneill #define IMX6SL_CLK_ENET_REF		17
     29      1.1  jmcneill #define IMX6SL_CLK_PLL2_PFD0		18
     30      1.1  jmcneill #define IMX6SL_CLK_PLL2_PFD1		19
     31      1.1  jmcneill #define IMX6SL_CLK_PLL2_PFD2		20
     32      1.1  jmcneill #define IMX6SL_CLK_PLL3_PFD0		21
     33      1.1  jmcneill #define IMX6SL_CLK_PLL3_PFD1		22
     34      1.1  jmcneill #define IMX6SL_CLK_PLL3_PFD2		23
     35      1.1  jmcneill #define IMX6SL_CLK_PLL3_PFD3		24
     36      1.1  jmcneill #define IMX6SL_CLK_PLL2_198M		25
     37      1.1  jmcneill #define IMX6SL_CLK_PLL3_120M		26
     38      1.1  jmcneill #define IMX6SL_CLK_PLL3_80M		27
     39      1.1  jmcneill #define IMX6SL_CLK_PLL3_60M		28
     40      1.1  jmcneill #define IMX6SL_CLK_STEP			29
     41      1.1  jmcneill #define IMX6SL_CLK_PLL1_SW		30
     42      1.1  jmcneill #define IMX6SL_CLK_OCRAM_ALT_SEL	31
     43      1.1  jmcneill #define IMX6SL_CLK_OCRAM_SEL		32
     44      1.1  jmcneill #define IMX6SL_CLK_PRE_PERIPH2_SEL	33
     45      1.1  jmcneill #define IMX6SL_CLK_PRE_PERIPH_SEL	34
     46      1.1  jmcneill #define IMX6SL_CLK_PERIPH2_CLK2_SEL	35
     47      1.1  jmcneill #define IMX6SL_CLK_PERIPH_CLK2_SEL	36
     48      1.1  jmcneill #define IMX6SL_CLK_CSI_SEL		37
     49      1.1  jmcneill #define IMX6SL_CLK_LCDIF_AXI_SEL	38
     50      1.1  jmcneill #define IMX6SL_CLK_USDHC1_SEL		39
     51      1.1  jmcneill #define IMX6SL_CLK_USDHC2_SEL		40
     52      1.1  jmcneill #define IMX6SL_CLK_USDHC3_SEL		41
     53      1.1  jmcneill #define IMX6SL_CLK_USDHC4_SEL		42
     54      1.1  jmcneill #define IMX6SL_CLK_SSI1_SEL		43
     55      1.1  jmcneill #define IMX6SL_CLK_SSI2_SEL		44
     56      1.1  jmcneill #define IMX6SL_CLK_SSI3_SEL		45
     57      1.1  jmcneill #define IMX6SL_CLK_PERCLK_SEL		46
     58      1.1  jmcneill #define IMX6SL_CLK_PXP_AXI_SEL		47
     59      1.1  jmcneill #define IMX6SL_CLK_EPDC_AXI_SEL		48
     60      1.1  jmcneill #define IMX6SL_CLK_GPU2D_OVG_SEL	49
     61      1.1  jmcneill #define IMX6SL_CLK_GPU2D_SEL		50
     62      1.1  jmcneill #define IMX6SL_CLK_LCDIF_PIX_SEL	51
     63      1.1  jmcneill #define IMX6SL_CLK_EPDC_PIX_SEL		52
     64      1.1  jmcneill #define IMX6SL_CLK_SPDIF0_SEL		53
     65      1.1  jmcneill #define IMX6SL_CLK_SPDIF1_SEL		54
     66      1.1  jmcneill #define IMX6SL_CLK_EXTERN_AUDIO_SEL	55
     67      1.1  jmcneill #define IMX6SL_CLK_ECSPI_SEL		56
     68      1.1  jmcneill #define IMX6SL_CLK_UART_SEL		57
     69      1.1  jmcneill #define IMX6SL_CLK_PERIPH		58
     70      1.1  jmcneill #define IMX6SL_CLK_PERIPH2		59
     71      1.1  jmcneill #define IMX6SL_CLK_OCRAM_PODF		60
     72      1.1  jmcneill #define IMX6SL_CLK_PERIPH_CLK2_PODF	61
     73      1.1  jmcneill #define IMX6SL_CLK_PERIPH2_CLK2_PODF	62
     74      1.1  jmcneill #define IMX6SL_CLK_IPG			63
     75      1.1  jmcneill #define IMX6SL_CLK_CSI_PODF		64
     76      1.1  jmcneill #define IMX6SL_CLK_LCDIF_AXI_PODF	65
     77      1.1  jmcneill #define IMX6SL_CLK_USDHC1_PODF		66
     78      1.1  jmcneill #define IMX6SL_CLK_USDHC2_PODF		67
     79      1.1  jmcneill #define IMX6SL_CLK_USDHC3_PODF		68
     80      1.1  jmcneill #define IMX6SL_CLK_USDHC4_PODF		69
     81      1.1  jmcneill #define IMX6SL_CLK_SSI1_PRED		70
     82      1.1  jmcneill #define IMX6SL_CLK_SSI1_PODF		71
     83      1.1  jmcneill #define IMX6SL_CLK_SSI2_PRED		72
     84      1.1  jmcneill #define IMX6SL_CLK_SSI2_PODF		73
     85      1.1  jmcneill #define IMX6SL_CLK_SSI3_PRED		74
     86      1.1  jmcneill #define IMX6SL_CLK_SSI3_PODF		75
     87      1.1  jmcneill #define IMX6SL_CLK_PERCLK		76
     88      1.1  jmcneill #define IMX6SL_CLK_PXP_AXI_PODF		77
     89      1.1  jmcneill #define IMX6SL_CLK_EPDC_AXI_PODF	78
     90      1.1  jmcneill #define IMX6SL_CLK_GPU2D_OVG_PODF	79
     91      1.1  jmcneill #define IMX6SL_CLK_GPU2D_PODF		80
     92      1.1  jmcneill #define IMX6SL_CLK_LCDIF_PIX_PRED	81
     93      1.1  jmcneill #define IMX6SL_CLK_EPDC_PIX_PRED	82
     94      1.1  jmcneill #define IMX6SL_CLK_LCDIF_PIX_PODF	83
     95      1.1  jmcneill #define IMX6SL_CLK_EPDC_PIX_PODF	84
     96      1.1  jmcneill #define IMX6SL_CLK_SPDIF0_PRED		85
     97      1.1  jmcneill #define IMX6SL_CLK_SPDIF0_PODF		86
     98      1.1  jmcneill #define IMX6SL_CLK_SPDIF1_PRED		87
     99      1.1  jmcneill #define IMX6SL_CLK_SPDIF1_PODF		88
    100      1.1  jmcneill #define IMX6SL_CLK_EXTERN_AUDIO_PRED	89
    101      1.1  jmcneill #define IMX6SL_CLK_EXTERN_AUDIO_PODF	90
    102      1.1  jmcneill #define IMX6SL_CLK_ECSPI_ROOT		91
    103      1.1  jmcneill #define IMX6SL_CLK_UART_ROOT		92
    104      1.1  jmcneill #define IMX6SL_CLK_AHB			93
    105      1.1  jmcneill #define IMX6SL_CLK_MMDC_ROOT		94
    106      1.1  jmcneill #define IMX6SL_CLK_ARM			95
    107      1.1  jmcneill #define IMX6SL_CLK_ECSPI1		96
    108      1.1  jmcneill #define IMX6SL_CLK_ECSPI2		97
    109      1.1  jmcneill #define IMX6SL_CLK_ECSPI3		98
    110      1.1  jmcneill #define IMX6SL_CLK_ECSPI4		99
    111      1.1  jmcneill #define IMX6SL_CLK_EPIT1		100
    112      1.1  jmcneill #define IMX6SL_CLK_EPIT2		101
    113      1.1  jmcneill #define IMX6SL_CLK_EXTERN_AUDIO		102
    114      1.1  jmcneill #define IMX6SL_CLK_GPT			103
    115      1.1  jmcneill #define IMX6SL_CLK_GPT_SERIAL		104
    116      1.1  jmcneill #define IMX6SL_CLK_GPU2D_OVG		105
    117      1.1  jmcneill #define IMX6SL_CLK_I2C1			106
    118      1.1  jmcneill #define IMX6SL_CLK_I2C2			107
    119      1.1  jmcneill #define IMX6SL_CLK_I2C3			108
    120      1.1  jmcneill #define IMX6SL_CLK_OCOTP		109
    121      1.1  jmcneill #define IMX6SL_CLK_CSI			110
    122      1.1  jmcneill #define IMX6SL_CLK_PXP_AXI		111
    123      1.1  jmcneill #define IMX6SL_CLK_EPDC_AXI		112
    124      1.1  jmcneill #define IMX6SL_CLK_LCDIF_AXI		113
    125      1.1  jmcneill #define IMX6SL_CLK_LCDIF_PIX		114
    126      1.1  jmcneill #define IMX6SL_CLK_EPDC_PIX		115
    127      1.1  jmcneill #define IMX6SL_CLK_OCRAM		116
    128      1.1  jmcneill #define IMX6SL_CLK_PWM1			117
    129      1.1  jmcneill #define IMX6SL_CLK_PWM2			118
    130      1.1  jmcneill #define IMX6SL_CLK_PWM3			119
    131      1.1  jmcneill #define IMX6SL_CLK_PWM4			120
    132      1.1  jmcneill #define IMX6SL_CLK_SDMA			121
    133      1.1  jmcneill #define IMX6SL_CLK_SPDIF		122
    134      1.1  jmcneill #define IMX6SL_CLK_SSI1			123
    135      1.1  jmcneill #define IMX6SL_CLK_SSI2			124
    136      1.1  jmcneill #define IMX6SL_CLK_SSI3			125
    137      1.1  jmcneill #define IMX6SL_CLK_UART			126
    138      1.1  jmcneill #define IMX6SL_CLK_UART_SERIAL		127
    139      1.1  jmcneill #define IMX6SL_CLK_USBOH3		128
    140      1.1  jmcneill #define IMX6SL_CLK_USDHC1		129
    141      1.1  jmcneill #define IMX6SL_CLK_USDHC2		130
    142      1.1  jmcneill #define IMX6SL_CLK_USDHC3		131
    143      1.1  jmcneill #define IMX6SL_CLK_USDHC4		132
    144      1.1  jmcneill #define IMX6SL_CLK_PLL4_AUDIO_DIV	133
    145      1.1  jmcneill #define IMX6SL_CLK_SPBA			134
    146      1.1  jmcneill #define IMX6SL_CLK_ENET			135
    147      1.1  jmcneill #define IMX6SL_CLK_LVDS1_SEL		136
    148      1.1  jmcneill #define IMX6SL_CLK_LVDS1_OUT		137
    149      1.1  jmcneill #define IMX6SL_CLK_LVDS1_IN		138
    150      1.1  jmcneill #define IMX6SL_CLK_ANACLK1		139
    151      1.1  jmcneill #define IMX6SL_PLL1_BYPASS_SRC		140
    152      1.1  jmcneill #define IMX6SL_PLL2_BYPASS_SRC		141
    153      1.1  jmcneill #define IMX6SL_PLL3_BYPASS_SRC		142
    154      1.1  jmcneill #define IMX6SL_PLL4_BYPASS_SRC		143
    155      1.1  jmcneill #define IMX6SL_PLL5_BYPASS_SRC		144
    156      1.1  jmcneill #define IMX6SL_PLL6_BYPASS_SRC		145
    157      1.1  jmcneill #define IMX6SL_PLL7_BYPASS_SRC		146
    158      1.1  jmcneill #define IMX6SL_CLK_PLL1			147
    159      1.1  jmcneill #define IMX6SL_CLK_PLL2			148
    160      1.1  jmcneill #define IMX6SL_CLK_PLL3			149
    161      1.1  jmcneill #define IMX6SL_CLK_PLL4			150
    162      1.1  jmcneill #define IMX6SL_CLK_PLL5			151
    163      1.1  jmcneill #define IMX6SL_CLK_PLL6			152
    164      1.1  jmcneill #define IMX6SL_CLK_PLL7			153
    165      1.1  jmcneill #define IMX6SL_PLL1_BYPASS		154
    166      1.1  jmcneill #define IMX6SL_PLL2_BYPASS		155
    167      1.1  jmcneill #define IMX6SL_PLL3_BYPASS		156
    168      1.1  jmcneill #define IMX6SL_PLL4_BYPASS		157
    169      1.1  jmcneill #define IMX6SL_PLL5_BYPASS		158
    170      1.1  jmcneill #define IMX6SL_PLL6_BYPASS		159
    171      1.1  jmcneill #define IMX6SL_PLL7_BYPASS		160
    172      1.1  jmcneill #define IMX6SL_CLK_SSI1_IPG		161
    173      1.1  jmcneill #define IMX6SL_CLK_SSI2_IPG		162
    174      1.1  jmcneill #define IMX6SL_CLK_SSI3_IPG		163
    175      1.1  jmcneill #define IMX6SL_CLK_SPDIF_GCLK		164
    176  1.1.1.2  jmcneill #define IMX6SL_CLK_MMDC_P0_IPG		165
    177  1.1.1.2  jmcneill #define IMX6SL_CLK_MMDC_P1_IPG		166
    178  1.1.1.2  jmcneill #define IMX6SL_CLK_END			167
    179      1.1  jmcneill 
    180      1.1  jmcneill #endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */
    181