1 1.1 jmcneill /* $NetBSD: imx8mp-clock.h,v 1.1.1.1 2021/11/07 16:49:59 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /* SPDX-License-Identifier: GPL-2.0 */ 4 1.1 jmcneill /* 5 1.1 jmcneill * Copyright 2019 NXP 6 1.1 jmcneill */ 7 1.1 jmcneill 8 1.1 jmcneill #ifndef __DT_BINDINGS_CLOCK_IMX8MP_H 9 1.1 jmcneill #define __DT_BINDINGS_CLOCK_IMX8MP_H 10 1.1 jmcneill 11 1.1 jmcneill #define IMX8MP_CLK_DUMMY 0 12 1.1 jmcneill #define IMX8MP_CLK_32K 1 13 1.1 jmcneill #define IMX8MP_CLK_24M 2 14 1.1 jmcneill #define IMX8MP_OSC_HDMI_CLK 3 15 1.1 jmcneill #define IMX8MP_CLK_EXT1 4 16 1.1 jmcneill #define IMX8MP_CLK_EXT2 5 17 1.1 jmcneill #define IMX8MP_CLK_EXT3 6 18 1.1 jmcneill #define IMX8MP_CLK_EXT4 7 19 1.1 jmcneill #define IMX8MP_AUDIO_PLL1_REF_SEL 8 20 1.1 jmcneill #define IMX8MP_AUDIO_PLL2_REF_SEL 9 21 1.1 jmcneill #define IMX8MP_VIDEO_PLL1_REF_SEL 10 22 1.1 jmcneill #define IMX8MP_DRAM_PLL_REF_SEL 11 23 1.1 jmcneill #define IMX8MP_GPU_PLL_REF_SEL 12 24 1.1 jmcneill #define IMX8MP_VPU_PLL_REF_SEL 13 25 1.1 jmcneill #define IMX8MP_ARM_PLL_REF_SEL 14 26 1.1 jmcneill #define IMX8MP_SYS_PLL1_REF_SEL 15 27 1.1 jmcneill #define IMX8MP_SYS_PLL2_REF_SEL 16 28 1.1 jmcneill #define IMX8MP_SYS_PLL3_REF_SEL 17 29 1.1 jmcneill #define IMX8MP_AUDIO_PLL1 18 30 1.1 jmcneill #define IMX8MP_AUDIO_PLL2 19 31 1.1 jmcneill #define IMX8MP_VIDEO_PLL1 20 32 1.1 jmcneill #define IMX8MP_DRAM_PLL 21 33 1.1 jmcneill #define IMX8MP_GPU_PLL 22 34 1.1 jmcneill #define IMX8MP_VPU_PLL 23 35 1.1 jmcneill #define IMX8MP_ARM_PLL 24 36 1.1 jmcneill #define IMX8MP_SYS_PLL1 25 37 1.1 jmcneill #define IMX8MP_SYS_PLL2 26 38 1.1 jmcneill #define IMX8MP_SYS_PLL3 27 39 1.1 jmcneill #define IMX8MP_AUDIO_PLL1_BYPASS 28 40 1.1 jmcneill #define IMX8MP_AUDIO_PLL2_BYPASS 29 41 1.1 jmcneill #define IMX8MP_VIDEO_PLL1_BYPASS 30 42 1.1 jmcneill #define IMX8MP_DRAM_PLL_BYPASS 31 43 1.1 jmcneill #define IMX8MP_GPU_PLL_BYPASS 32 44 1.1 jmcneill #define IMX8MP_VPU_PLL_BYPASS 33 45 1.1 jmcneill #define IMX8MP_ARM_PLL_BYPASS 34 46 1.1 jmcneill #define IMX8MP_SYS_PLL1_BYPASS 35 47 1.1 jmcneill #define IMX8MP_SYS_PLL2_BYPASS 36 48 1.1 jmcneill #define IMX8MP_SYS_PLL3_BYPASS 37 49 1.1 jmcneill #define IMX8MP_AUDIO_PLL1_OUT 38 50 1.1 jmcneill #define IMX8MP_AUDIO_PLL2_OUT 39 51 1.1 jmcneill #define IMX8MP_VIDEO_PLL1_OUT 40 52 1.1 jmcneill #define IMX8MP_DRAM_PLL_OUT 41 53 1.1 jmcneill #define IMX8MP_GPU_PLL_OUT 42 54 1.1 jmcneill #define IMX8MP_VPU_PLL_OUT 43 55 1.1 jmcneill #define IMX8MP_ARM_PLL_OUT 44 56 1.1 jmcneill #define IMX8MP_SYS_PLL1_OUT 45 57 1.1 jmcneill #define IMX8MP_SYS_PLL2_OUT 46 58 1.1 jmcneill #define IMX8MP_SYS_PLL3_OUT 47 59 1.1 jmcneill #define IMX8MP_SYS_PLL1_40M 48 60 1.1 jmcneill #define IMX8MP_SYS_PLL1_80M 49 61 1.1 jmcneill #define IMX8MP_SYS_PLL1_100M 50 62 1.1 jmcneill #define IMX8MP_SYS_PLL1_133M 51 63 1.1 jmcneill #define IMX8MP_SYS_PLL1_160M 52 64 1.1 jmcneill #define IMX8MP_SYS_PLL1_200M 53 65 1.1 jmcneill #define IMX8MP_SYS_PLL1_266M 54 66 1.1 jmcneill #define IMX8MP_SYS_PLL1_400M 55 67 1.1 jmcneill #define IMX8MP_SYS_PLL1_800M 56 68 1.1 jmcneill #define IMX8MP_SYS_PLL2_50M 57 69 1.1 jmcneill #define IMX8MP_SYS_PLL2_100M 58 70 1.1 jmcneill #define IMX8MP_SYS_PLL2_125M 59 71 1.1 jmcneill #define IMX8MP_SYS_PLL2_166M 60 72 1.1 jmcneill #define IMX8MP_SYS_PLL2_200M 61 73 1.1 jmcneill #define IMX8MP_SYS_PLL2_250M 62 74 1.1 jmcneill #define IMX8MP_SYS_PLL2_333M 63 75 1.1 jmcneill #define IMX8MP_SYS_PLL2_500M 64 76 1.1 jmcneill #define IMX8MP_SYS_PLL2_1000M 65 77 1.1 jmcneill #define IMX8MP_CLK_A53_SRC 66 78 1.1 jmcneill #define IMX8MP_CLK_M7_SRC 67 79 1.1 jmcneill #define IMX8MP_CLK_ML_SRC 68 80 1.1 jmcneill #define IMX8MP_CLK_GPU3D_CORE_SRC 69 81 1.1 jmcneill #define IMX8MP_CLK_GPU3D_SHADER_SRC 70 82 1.1 jmcneill #define IMX8MP_CLK_GPU2D_SRC 71 83 1.1 jmcneill #define IMX8MP_CLK_AUDIO_AXI_SRC 72 84 1.1 jmcneill #define IMX8MP_CLK_HSIO_AXI_SRC 73 85 1.1 jmcneill #define IMX8MP_CLK_MEDIA_ISP_SRC 74 86 1.1 jmcneill #define IMX8MP_CLK_A53_CG 75 87 1.1 jmcneill #define IMX8MP_CLK_M4_CG 76 88 1.1 jmcneill #define IMX8MP_CLK_ML_CG 77 89 1.1 jmcneill #define IMX8MP_CLK_GPU3D_CORE_CG 78 90 1.1 jmcneill #define IMX8MP_CLK_GPU3D_SHADER_CG 79 91 1.1 jmcneill #define IMX8MP_CLK_GPU2D_CG 80 92 1.1 jmcneill #define IMX8MP_CLK_AUDIO_AXI_CG 81 93 1.1 jmcneill #define IMX8MP_CLK_HSIO_AXI_CG 82 94 1.1 jmcneill #define IMX8MP_CLK_MEDIA_ISP_CG 83 95 1.1 jmcneill #define IMX8MP_CLK_A53_DIV 84 96 1.1 jmcneill #define IMX8MP_CLK_M7_DIV 85 97 1.1 jmcneill #define IMX8MP_CLK_ML_DIV 86 98 1.1 jmcneill #define IMX8MP_CLK_GPU3D_CORE_DIV 87 99 1.1 jmcneill #define IMX8MP_CLK_GPU3D_SHADER_DIV 88 100 1.1 jmcneill #define IMX8MP_CLK_GPU2D_DIV 89 101 1.1 jmcneill #define IMX8MP_CLK_AUDIO_AXI_DIV 90 102 1.1 jmcneill #define IMX8MP_CLK_HSIO_AXI_DIV 91 103 1.1 jmcneill #define IMX8MP_CLK_MEDIA_ISP_DIV 92 104 1.1 jmcneill #define IMX8MP_CLK_MAIN_AXI 93 105 1.1 jmcneill #define IMX8MP_CLK_ENET_AXI 94 106 1.1 jmcneill #define IMX8MP_CLK_NAND_USDHC_BUS 95 107 1.1 jmcneill #define IMX8MP_CLK_VPU_BUS 96 108 1.1 jmcneill #define IMX8MP_CLK_MEDIA_AXI 97 109 1.1 jmcneill #define IMX8MP_CLK_MEDIA_APB 98 110 1.1 jmcneill #define IMX8MP_CLK_HDMI_APB 99 111 1.1 jmcneill #define IMX8MP_CLK_HDMI_AXI 100 112 1.1 jmcneill #define IMX8MP_CLK_GPU_AXI 101 113 1.1 jmcneill #define IMX8MP_CLK_GPU_AHB 102 114 1.1 jmcneill #define IMX8MP_CLK_NOC 103 115 1.1 jmcneill #define IMX8MP_CLK_NOC_IO 104 116 1.1 jmcneill #define IMX8MP_CLK_ML_AXI 105 117 1.1 jmcneill #define IMX8MP_CLK_ML_AHB 106 118 1.1 jmcneill #define IMX8MP_CLK_AHB 107 119 1.1 jmcneill #define IMX8MP_CLK_AUDIO_AHB 108 120 1.1 jmcneill #define IMX8MP_CLK_MIPI_DSI_ESC_RX 109 121 1.1 jmcneill #define IMX8MP_CLK_IPG_ROOT 110 122 1.1 jmcneill #define IMX8MP_CLK_IPG_AUDIO_ROOT 111 123 1.1 jmcneill #define IMX8MP_CLK_DRAM_ALT 112 124 1.1 jmcneill #define IMX8MP_CLK_DRAM_APB 113 125 1.1 jmcneill #define IMX8MP_CLK_VPU_G1 114 126 1.1 jmcneill #define IMX8MP_CLK_VPU_G2 115 127 1.1 jmcneill #define IMX8MP_CLK_CAN1 116 128 1.1 jmcneill #define IMX8MP_CLK_CAN2 117 129 1.1 jmcneill #define IMX8MP_CLK_MEMREPAIR 118 130 1.1 jmcneill #define IMX8MP_CLK_PCIE_AUX 120 131 1.1 jmcneill #define IMX8MP_CLK_I2C5 121 132 1.1 jmcneill #define IMX8MP_CLK_I2C6 122 133 1.1 jmcneill #define IMX8MP_CLK_SAI1 123 134 1.1 jmcneill #define IMX8MP_CLK_SAI2 124 135 1.1 jmcneill #define IMX8MP_CLK_SAI3 125 136 1.1 jmcneill #define IMX8MP_CLK_SAI4 126 137 1.1 jmcneill #define IMX8MP_CLK_SAI5 127 138 1.1 jmcneill #define IMX8MP_CLK_SAI6 128 139 1.1 jmcneill #define IMX8MP_CLK_ENET_QOS 129 140 1.1 jmcneill #define IMX8MP_CLK_ENET_QOS_TIMER 130 141 1.1 jmcneill #define IMX8MP_CLK_ENET_REF 131 142 1.1 jmcneill #define IMX8MP_CLK_ENET_TIMER 132 143 1.1 jmcneill #define IMX8MP_CLK_ENET_PHY_REF 133 144 1.1 jmcneill #define IMX8MP_CLK_NAND 134 145 1.1 jmcneill #define IMX8MP_CLK_QSPI 135 146 1.1 jmcneill #define IMX8MP_CLK_USDHC1 136 147 1.1 jmcneill #define IMX8MP_CLK_USDHC2 137 148 1.1 jmcneill #define IMX8MP_CLK_I2C1 138 149 1.1 jmcneill #define IMX8MP_CLK_I2C2 139 150 1.1 jmcneill #define IMX8MP_CLK_I2C3 140 151 1.1 jmcneill #define IMX8MP_CLK_I2C4 141 152 1.1 jmcneill #define IMX8MP_CLK_UART1 142 153 1.1 jmcneill #define IMX8MP_CLK_UART2 143 154 1.1 jmcneill #define IMX8MP_CLK_UART3 144 155 1.1 jmcneill #define IMX8MP_CLK_UART4 145 156 1.1 jmcneill #define IMX8MP_CLK_USB_CORE_REF 146 157 1.1 jmcneill #define IMX8MP_CLK_USB_PHY_REF 147 158 1.1 jmcneill #define IMX8MP_CLK_GIC 148 159 1.1 jmcneill #define IMX8MP_CLK_ECSPI1 149 160 1.1 jmcneill #define IMX8MP_CLK_ECSPI2 150 161 1.1 jmcneill #define IMX8MP_CLK_PWM1 151 162 1.1 jmcneill #define IMX8MP_CLK_PWM2 152 163 1.1 jmcneill #define IMX8MP_CLK_PWM3 153 164 1.1 jmcneill #define IMX8MP_CLK_PWM4 154 165 1.1 jmcneill #define IMX8MP_CLK_GPT1 155 166 1.1 jmcneill #define IMX8MP_CLK_GPT2 156 167 1.1 jmcneill #define IMX8MP_CLK_GPT3 157 168 1.1 jmcneill #define IMX8MP_CLK_GPT4 158 169 1.1 jmcneill #define IMX8MP_CLK_GPT5 159 170 1.1 jmcneill #define IMX8MP_CLK_GPT6 160 171 1.1 jmcneill #define IMX8MP_CLK_TRACE 161 172 1.1 jmcneill #define IMX8MP_CLK_WDOG 162 173 1.1 jmcneill #define IMX8MP_CLK_WRCLK 163 174 1.1 jmcneill #define IMX8MP_CLK_IPP_DO_CLKO1 164 175 1.1 jmcneill #define IMX8MP_CLK_IPP_DO_CLKO2 165 176 1.1 jmcneill #define IMX8MP_CLK_HDMI_FDCC_TST 166 177 1.1 jmcneill #define IMX8MP_CLK_HDMI_24M 167 178 1.1 jmcneill #define IMX8MP_CLK_HDMI_REF_266M 168 179 1.1 jmcneill #define IMX8MP_CLK_USDHC3 169 180 1.1 jmcneill #define IMX8MP_CLK_MEDIA_CAM1_PIX 170 181 1.1 jmcneill #define IMX8MP_CLK_MEDIA_MIPI_PHY1_REF 171 182 1.1 jmcneill #define IMX8MP_CLK_MEDIA_DISP1_PIX 172 183 1.1 jmcneill #define IMX8MP_CLK_MEDIA_CAM2_PIX 173 184 1.1 jmcneill #define IMX8MP_CLK_MEDIA_LDB 174 185 1.1 jmcneill #define IMX8MP_CLK_MEDIA_MIPI_CSI2_ESC 175 186 1.1 jmcneill #define IMX8MP_CLK_MEDIA_MIPI_TEST_BYTE 178 187 1.1 jmcneill #define IMX8MP_CLK_ECSPI3 179 188 1.1 jmcneill #define IMX8MP_CLK_PDM 180 189 1.1 jmcneill #define IMX8MP_CLK_VPU_VC8000E 181 190 1.1 jmcneill #define IMX8MP_CLK_SAI7 182 191 1.1 jmcneill #define IMX8MP_CLK_GPC_ROOT 183 192 1.1 jmcneill #define IMX8MP_CLK_ANAMIX_ROOT 184 193 1.1 jmcneill #define IMX8MP_CLK_CPU_ROOT 185 194 1.1 jmcneill #define IMX8MP_CLK_CSU_ROOT 186 195 1.1 jmcneill #define IMX8MP_CLK_DEBUG_ROOT 187 196 1.1 jmcneill #define IMX8MP_CLK_DRAM1_ROOT 188 197 1.1 jmcneill #define IMX8MP_CLK_ECSPI1_ROOT 189 198 1.1 jmcneill #define IMX8MP_CLK_ECSPI2_ROOT 190 199 1.1 jmcneill #define IMX8MP_CLK_ECSPI3_ROOT 191 200 1.1 jmcneill #define IMX8MP_CLK_ENET1_ROOT 192 201 1.1 jmcneill #define IMX8MP_CLK_GPIO1_ROOT 193 202 1.1 jmcneill #define IMX8MP_CLK_GPIO2_ROOT 194 203 1.1 jmcneill #define IMX8MP_CLK_GPIO3_ROOT 195 204 1.1 jmcneill #define IMX8MP_CLK_GPIO4_ROOT 196 205 1.1 jmcneill #define IMX8MP_CLK_GPIO5_ROOT 197 206 1.1 jmcneill #define IMX8MP_CLK_GPT1_ROOT 198 207 1.1 jmcneill #define IMX8MP_CLK_GPT2_ROOT 199 208 1.1 jmcneill #define IMX8MP_CLK_GPT3_ROOT 200 209 1.1 jmcneill #define IMX8MP_CLK_GPT4_ROOT 201 210 1.1 jmcneill #define IMX8MP_CLK_GPT5_ROOT 202 211 1.1 jmcneill #define IMX8MP_CLK_GPT6_ROOT 203 212 1.1 jmcneill #define IMX8MP_CLK_HS_ROOT 204 213 1.1 jmcneill #define IMX8MP_CLK_I2C1_ROOT 205 214 1.1 jmcneill #define IMX8MP_CLK_I2C2_ROOT 206 215 1.1 jmcneill #define IMX8MP_CLK_I2C3_ROOT 207 216 1.1 jmcneill #define IMX8MP_CLK_I2C4_ROOT 208 217 1.1 jmcneill #define IMX8MP_CLK_IOMUX_ROOT 209 218 1.1 jmcneill #define IMX8MP_CLK_IPMUX1_ROOT 210 219 1.1 jmcneill #define IMX8MP_CLK_IPMUX2_ROOT 211 220 1.1 jmcneill #define IMX8MP_CLK_IPMUX3_ROOT 212 221 1.1 jmcneill #define IMX8MP_CLK_MU_ROOT 213 222 1.1 jmcneill #define IMX8MP_CLK_OCOTP_ROOT 214 223 1.1 jmcneill #define IMX8MP_CLK_OCRAM_ROOT 215 224 1.1 jmcneill #define IMX8MP_CLK_OCRAM_S_ROOT 216 225 1.1 jmcneill #define IMX8MP_CLK_PCIE_ROOT 217 226 1.1 jmcneill #define IMX8MP_CLK_PERFMON1_ROOT 218 227 1.1 jmcneill #define IMX8MP_CLK_PERFMON2_ROOT 219 228 1.1 jmcneill #define IMX8MP_CLK_PWM1_ROOT 220 229 1.1 jmcneill #define IMX8MP_CLK_PWM2_ROOT 221 230 1.1 jmcneill #define IMX8MP_CLK_PWM3_ROOT 222 231 1.1 jmcneill #define IMX8MP_CLK_PWM4_ROOT 223 232 1.1 jmcneill #define IMX8MP_CLK_QOS_ROOT 224 233 1.1 jmcneill #define IMX8MP_CLK_QOS_ENET_ROOT 225 234 1.1 jmcneill #define IMX8MP_CLK_QSPI_ROOT 226 235 1.1 jmcneill #define IMX8MP_CLK_NAND_ROOT 227 236 1.1 jmcneill #define IMX8MP_CLK_NAND_USDHC_BUS_RAWNAND_CLK 228 237 1.1 jmcneill #define IMX8MP_CLK_RDC_ROOT 229 238 1.1 jmcneill #define IMX8MP_CLK_ROM_ROOT 230 239 1.1 jmcneill #define IMX8MP_CLK_I2C5_ROOT 231 240 1.1 jmcneill #define IMX8MP_CLK_I2C6_ROOT 232 241 1.1 jmcneill #define IMX8MP_CLK_CAN1_ROOT 233 242 1.1 jmcneill #define IMX8MP_CLK_CAN2_ROOT 234 243 1.1 jmcneill #define IMX8MP_CLK_SCTR_ROOT 235 244 1.1 jmcneill #define IMX8MP_CLK_SDMA1_ROOT 236 245 1.1 jmcneill #define IMX8MP_CLK_ENET_QOS_ROOT 237 246 1.1 jmcneill #define IMX8MP_CLK_SEC_DEBUG_ROOT 238 247 1.1 jmcneill #define IMX8MP_CLK_SEMA1_ROOT 239 248 1.1 jmcneill #define IMX8MP_CLK_SEMA2_ROOT 240 249 1.1 jmcneill #define IMX8MP_CLK_IRQ_STEER_ROOT 241 250 1.1 jmcneill #define IMX8MP_CLK_SIM_ENET_ROOT 242 251 1.1 jmcneill #define IMX8MP_CLK_SIM_M_ROOT 243 252 1.1 jmcneill #define IMX8MP_CLK_SIM_MAIN_ROOT 244 253 1.1 jmcneill #define IMX8MP_CLK_SIM_S_ROOT 245 254 1.1 jmcneill #define IMX8MP_CLK_SIM_WAKEUP_ROOT 246 255 1.1 jmcneill #define IMX8MP_CLK_GPU2D_ROOT 247 256 1.1 jmcneill #define IMX8MP_CLK_GPU3D_ROOT 248 257 1.1 jmcneill #define IMX8MP_CLK_SNVS_ROOT 249 258 1.1 jmcneill #define IMX8MP_CLK_TRACE_ROOT 250 259 1.1 jmcneill #define IMX8MP_CLK_UART1_ROOT 251 260 1.1 jmcneill #define IMX8MP_CLK_UART2_ROOT 252 261 1.1 jmcneill #define IMX8MP_CLK_UART3_ROOT 253 262 1.1 jmcneill #define IMX8MP_CLK_UART4_ROOT 254 263 1.1 jmcneill #define IMX8MP_CLK_USB_ROOT 255 264 1.1 jmcneill #define IMX8MP_CLK_USB_PHY_ROOT 256 265 1.1 jmcneill #define IMX8MP_CLK_USDHC1_ROOT 257 266 1.1 jmcneill #define IMX8MP_CLK_USDHC2_ROOT 258 267 1.1 jmcneill #define IMX8MP_CLK_WDOG1_ROOT 259 268 1.1 jmcneill #define IMX8MP_CLK_WDOG2_ROOT 260 269 1.1 jmcneill #define IMX8MP_CLK_WDOG3_ROOT 261 270 1.1 jmcneill #define IMX8MP_CLK_VPU_G1_ROOT 262 271 1.1 jmcneill #define IMX8MP_CLK_GPU_ROOT 263 272 1.1 jmcneill #define IMX8MP_CLK_NOC_WRAPPER_ROOT 264 273 1.1 jmcneill #define IMX8MP_CLK_VPU_VC8KE_ROOT 265 274 1.1 jmcneill #define IMX8MP_CLK_VPU_G2_ROOT 266 275 1.1 jmcneill #define IMX8MP_CLK_NPU_ROOT 267 276 1.1 jmcneill #define IMX8MP_CLK_HSIO_ROOT 268 277 1.1 jmcneill #define IMX8MP_CLK_MEDIA_APB_ROOT 269 278 1.1 jmcneill #define IMX8MP_CLK_MEDIA_AXI_ROOT 270 279 1.1 jmcneill #define IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT 271 280 1.1 jmcneill #define IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT 272 281 1.1 jmcneill #define IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT 273 282 1.1 jmcneill #define IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT 274 283 1.1 jmcneill #define IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT 275 284 1.1 jmcneill #define IMX8MP_CLK_MEDIA_ISP_ROOT 276 285 1.1 jmcneill #define IMX8MP_CLK_USDHC3_ROOT 277 286 1.1 jmcneill #define IMX8MP_CLK_HDMI_ROOT 278 287 1.1 jmcneill #define IMX8MP_CLK_XTAL_ROOT 279 288 1.1 jmcneill #define IMX8MP_CLK_PLL_ROOT 280 289 1.1 jmcneill #define IMX8MP_CLK_TSENSOR_ROOT 281 290 1.1 jmcneill #define IMX8MP_CLK_VPU_ROOT 282 291 1.1 jmcneill #define IMX8MP_CLK_MRPR_ROOT 283 292 1.1 jmcneill #define IMX8MP_CLK_AUDIO_ROOT 284 293 1.1 jmcneill #define IMX8MP_CLK_DRAM_ALT_ROOT 285 294 1.1 jmcneill #define IMX8MP_CLK_DRAM_CORE 286 295 1.1 jmcneill #define IMX8MP_CLK_ARM 287 296 1.1 jmcneill #define IMX8MP_CLK_A53_CORE 288 297 1.1 jmcneill 298 1.1 jmcneill #define IMX8MP_SYS_PLL1_40M_CG 289 299 1.1 jmcneill #define IMX8MP_SYS_PLL1_80M_CG 290 300 1.1 jmcneill #define IMX8MP_SYS_PLL1_100M_CG 291 301 1.1 jmcneill #define IMX8MP_SYS_PLL1_133M_CG 292 302 1.1 jmcneill #define IMX8MP_SYS_PLL1_160M_CG 293 303 1.1 jmcneill #define IMX8MP_SYS_PLL1_200M_CG 294 304 1.1 jmcneill #define IMX8MP_SYS_PLL1_266M_CG 295 305 1.1 jmcneill #define IMX8MP_SYS_PLL1_400M_CG 296 306 1.1 jmcneill #define IMX8MP_SYS_PLL2_50M_CG 297 307 1.1 jmcneill #define IMX8MP_SYS_PLL2_100M_CG 298 308 1.1 jmcneill #define IMX8MP_SYS_PLL2_125M_CG 299 309 1.1 jmcneill #define IMX8MP_SYS_PLL2_166M_CG 300 310 1.1 jmcneill #define IMX8MP_SYS_PLL2_200M_CG 301 311 1.1 jmcneill #define IMX8MP_SYS_PLL2_250M_CG 302 312 1.1 jmcneill #define IMX8MP_SYS_PLL2_333M_CG 303 313 1.1 jmcneill #define IMX8MP_SYS_PLL2_500M_CG 304 314 1.1 jmcneill 315 1.1 jmcneill #define IMX8MP_CLK_M7_CORE 305 316 1.1 jmcneill #define IMX8MP_CLK_ML_CORE 306 317 1.1 jmcneill #define IMX8MP_CLK_GPU3D_CORE 307 318 1.1 jmcneill #define IMX8MP_CLK_GPU3D_SHADER_CORE 308 319 1.1 jmcneill #define IMX8MP_CLK_GPU2D_CORE 309 320 1.1 jmcneill #define IMX8MP_CLK_AUDIO_AXI 310 321 1.1 jmcneill #define IMX8MP_CLK_HSIO_AXI 311 322 1.1 jmcneill #define IMX8MP_CLK_MEDIA_ISP 312 323 1.1 jmcneill 324 1.1 jmcneill #define IMX8MP_CLK_END 313 325 1.1 jmcneill 326 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0 327 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1 328 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2 2 329 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3 3 330 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI2_IPG 4 331 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1 5 332 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2 6 333 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3 7 334 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI3_IPG 8 335 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1 9 336 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2 10 337 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3 11 338 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI5_IPG 12 339 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1 13 340 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2 14 341 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3 15 342 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI6_IPG 16 343 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1 17 344 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2 18 345 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3 19 346 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI7_IPG 20 347 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1 21 348 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2 22 349 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3 23 350 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_ASRC_IPG 24 351 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_PDM_IPG 25 352 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT 26 353 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT 27 354 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT 28 355 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_DSP_ROOT 29 356 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT 30 357 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_EARC_IPG 31 358 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG 32 359 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG 33 360 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_EDMA_ROOT 34 361 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT 35 362 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_MU2_ROOT 36 363 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_MU3_ROOT 37 364 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_EARC_PHY 38 365 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_PDM_ROOT 39 366 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL 40 367 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL 41 368 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL 42 369 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2_SEL 43 370 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1_SEL 44 371 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2_SEL 45 372 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK1_SEL 46 373 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK2_SEL 47 374 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1_SEL 48 375 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2_SEL 49 376 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1_SEL 50 377 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2_SEL 51 378 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1_SEL 52 379 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2_SEL 53 380 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_PDM_SEL 54 381 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL 55 382 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI_PLL 56 383 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS 57 384 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT 58 385 1.1 jmcneill 386 1.1 jmcneill #define IMX8MP_CLK_AUDIOMIX_END 59 387 1.1 jmcneill 388 1.1 jmcneill #endif 389