ingenic,jz4755-cgu.h revision 1.1.1.1 
1/*	$NetBSD: ingenic,jz4755-cgu.h,v 1.1.1.1 2026/01/18 05:21:31 skrll Exp $	*/
2
3/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
4/*
5 * This header provides clock numbers for the ingenic,jz4755-cgu DT binding.
6 */
7
8#ifndef __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
9#define __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
10
11#define JZ4755_CLK_EXT		0
12#define JZ4755_CLK_OSC32K	1
13#define JZ4755_CLK_PLL		2
14#define JZ4755_CLK_PLL_HALF	3
15#define JZ4755_CLK_EXT_HALF	4
16#define JZ4755_CLK_CCLK		5
17#define JZ4755_CLK_H0CLK	6
18#define JZ4755_CLK_PCLK		7
19#define JZ4755_CLK_MCLK		8
20#define JZ4755_CLK_H1CLK	9
21#define JZ4755_CLK_UDC		10
22#define JZ4755_CLK_LCD		11
23#define JZ4755_CLK_UART0	12
24#define JZ4755_CLK_UART1	13
25#define JZ4755_CLK_UART2	14
26#define JZ4755_CLK_DMA		15
27#define JZ4755_CLK_MMC		16
28#define JZ4755_CLK_MMC0		17
29#define JZ4755_CLK_MMC1		18
30#define JZ4755_CLK_EXT512	19
31#define JZ4755_CLK_RTC		20
32#define JZ4755_CLK_UDC_PHY	21
33#define JZ4755_CLK_I2S		22
34#define JZ4755_CLK_SPI		23
35#define JZ4755_CLK_AIC		24
36#define JZ4755_CLK_ADC		25
37#define JZ4755_CLK_TCU		26
38#define JZ4755_CLK_BCH		27
39#define JZ4755_CLK_I2C		28
40#define JZ4755_CLK_TVE		29
41#define JZ4755_CLK_CIM		30
42#define JZ4755_CLK_AUX_CPU	31
43#define JZ4755_CLK_AHB1		32
44#define JZ4755_CLK_IDCT		33
45#define JZ4755_CLK_DB		34
46#define JZ4755_CLK_ME		35
47#define JZ4755_CLK_MC		36
48#define JZ4755_CLK_TSSI		37
49#define JZ4755_CLK_IPU		38
50
51#endif /* __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ */
52