11.1Sskrll/* $NetBSD: ingenic,jz4725b-cgu.h,v 1.1.1.1 2026/01/18 05:21:31 skrll Exp $ */ 21.1Sskrll 31.1Sskrll/* SPDX-License-Identifier: GPL-2.0 */ 41.1Sskrll/* 51.1Sskrll * This header provides clock numbers for the ingenic,jz4725b-cgu DT binding. 61.1Sskrll */ 71.1Sskrll 81.1Sskrll#ifndef __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ 91.1Sskrll#define __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ 101.1Sskrll 111.1Sskrll#define JZ4725B_CLK_EXT 0 121.1Sskrll#define JZ4725B_CLK_OSC32K 1 131.1Sskrll#define JZ4725B_CLK_PLL 2 141.1Sskrll#define JZ4725B_CLK_PLL_HALF 3 151.1Sskrll#define JZ4725B_CLK_CCLK 4 161.1Sskrll#define JZ4725B_CLK_HCLK 5 171.1Sskrll#define JZ4725B_CLK_PCLK 6 181.1Sskrll#define JZ4725B_CLK_MCLK 7 191.1Sskrll#define JZ4725B_CLK_IPU 8 201.1Sskrll#define JZ4725B_CLK_LCD 9 211.1Sskrll#define JZ4725B_CLK_I2S 10 221.1Sskrll#define JZ4725B_CLK_SPI 11 231.1Sskrll#define JZ4725B_CLK_MMC_MUX 12 241.1Sskrll#define JZ4725B_CLK_UDC 13 251.1Sskrll#define JZ4725B_CLK_UART 14 261.1Sskrll#define JZ4725B_CLK_DMA 15 271.1Sskrll#define JZ4725B_CLK_ADC 16 281.1Sskrll#define JZ4725B_CLK_I2C 17 291.1Sskrll#define JZ4725B_CLK_AIC 18 301.1Sskrll#define JZ4725B_CLK_MMC0 19 311.1Sskrll#define JZ4725B_CLK_MMC1 20 321.1Sskrll#define JZ4725B_CLK_BCH 21 331.1Sskrll#define JZ4725B_CLK_TCU 22 341.1Sskrll#define JZ4725B_CLK_EXT512 23 351.1Sskrll#define JZ4725B_CLK_RTC 24 361.1Sskrll#define JZ4725B_CLK_UDC_PHY 25 371.1Sskrll 381.1Sskrll#endif /* __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ */ 39