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      1      1.1  jmcneill /*	$NetBSD: oxsemi,ox820.h,v 1.1.1.2 2020/01/03 14:33:04 skrll Exp $	*/
      2      1.1  jmcneill 
      3  1.1.1.2     skrll /* SPDX-License-Identifier: GPL-2.0-only */
      4      1.1  jmcneill /*
      5      1.1  jmcneill  * Copyright (C) 2016 Neil Armstrong <narmstrong (at) baylibre.com>
      6      1.1  jmcneill  */
      7      1.1  jmcneill 
      8      1.1  jmcneill #ifndef DT_CLOCK_OXSEMI_OX820_H
      9      1.1  jmcneill #define DT_CLOCK_OXSEMI_OX820_H
     10      1.1  jmcneill 
     11      1.1  jmcneill /* PLLs */
     12      1.1  jmcneill #define CLK_820_PLLA		0
     13      1.1  jmcneill #define CLK_820_PLLB		1
     14      1.1  jmcneill 
     15      1.1  jmcneill /* Gate Clocks */
     16      1.1  jmcneill #define CLK_820_LEON		2
     17      1.1  jmcneill #define CLK_820_DMA_SGDMA	3
     18      1.1  jmcneill #define CLK_820_CIPHER		4
     19      1.1  jmcneill #define CLK_820_SD		5
     20      1.1  jmcneill #define CLK_820_SATA		6
     21      1.1  jmcneill #define CLK_820_AUDIO		7
     22      1.1  jmcneill #define CLK_820_USBMPH		8
     23      1.1  jmcneill #define CLK_820_ETHA		9
     24      1.1  jmcneill #define CLK_820_PCIEA		10
     25      1.1  jmcneill #define CLK_820_NAND		11
     26      1.1  jmcneill #define CLK_820_PCIEB		12
     27      1.1  jmcneill #define CLK_820_ETHB		13
     28      1.1  jmcneill #define CLK_820_REF600		14
     29      1.1  jmcneill #define CLK_820_USBDEV		15
     30      1.1  jmcneill 
     31      1.1  jmcneill #endif /* DT_CLOCK_OXSEMI_OX820_H */
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