11.1Sskrll/* $NetBSD: qcom,ipq9574-gcc.h,v 1.1.1.1 2026/01/18 05:21:36 skrll Exp $ */ 21.1Sskrll 31.1Sskrll/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 41.1Sskrll/* 51.1Sskrll * Copyright (c) 2018-2023 The Linux Foundation. All rights reserved. 61.1Sskrll */ 71.1Sskrll 81.1Sskrll#ifndef _DT_BINDINGS_CLOCK_IPQ_GCC_9574_H 91.1Sskrll#define _DT_BINDINGS_CLOCK_IPQ_GCC_9574_H 101.1Sskrll 111.1Sskrll#define GPLL0_MAIN 0 121.1Sskrll#define GPLL0 1 131.1Sskrll#define GPLL2_MAIN 2 141.1Sskrll#define GPLL2 3 151.1Sskrll#define GPLL4_MAIN 4 161.1Sskrll#define GPLL4 5 171.1Sskrll#define GCC_SLEEP_CLK_SRC 6 181.1Sskrll#define APSS_AHB_CLK_SRC 7 191.1Sskrll#define APSS_AXI_CLK_SRC 8 201.1Sskrll#define BLSP1_QUP1_I2C_APPS_CLK_SRC 9 211.1Sskrll#define BLSP1_QUP1_SPI_APPS_CLK_SRC 10 221.1Sskrll#define BLSP1_QUP2_I2C_APPS_CLK_SRC 11 231.1Sskrll#define BLSP1_QUP2_SPI_APPS_CLK_SRC 12 241.1Sskrll#define BLSP1_QUP3_I2C_APPS_CLK_SRC 13 251.1Sskrll#define BLSP1_QUP3_SPI_APPS_CLK_SRC 14 261.1Sskrll#define BLSP1_QUP4_I2C_APPS_CLK_SRC 15 271.1Sskrll#define BLSP1_QUP4_SPI_APPS_CLK_SRC 16 281.1Sskrll#define BLSP1_QUP5_I2C_APPS_CLK_SRC 17 291.1Sskrll#define BLSP1_QUP5_SPI_APPS_CLK_SRC 18 301.1Sskrll#define BLSP1_QUP6_I2C_APPS_CLK_SRC 19 311.1Sskrll#define BLSP1_QUP6_SPI_APPS_CLK_SRC 20 321.1Sskrll#define BLSP1_UART1_APPS_CLK_SRC 21 331.1Sskrll#define BLSP1_UART2_APPS_CLK_SRC 22 341.1Sskrll#define BLSP1_UART3_APPS_CLK_SRC 23 351.1Sskrll#define BLSP1_UART4_APPS_CLK_SRC 24 361.1Sskrll#define BLSP1_UART5_APPS_CLK_SRC 25 371.1Sskrll#define BLSP1_UART6_APPS_CLK_SRC 26 381.1Sskrll#define GCC_APSS_AHB_CLK 27 391.1Sskrll#define GCC_APSS_AXI_CLK 28 401.1Sskrll#define GCC_BLSP1_QUP1_I2C_APPS_CLK 29 411.1Sskrll#define GCC_BLSP1_QUP1_SPI_APPS_CLK 30 421.1Sskrll#define GCC_BLSP1_QUP2_I2C_APPS_CLK 31 431.1Sskrll#define GCC_BLSP1_QUP2_SPI_APPS_CLK 32 441.1Sskrll#define GCC_BLSP1_QUP3_I2C_APPS_CLK 33 451.1Sskrll#define GCC_BLSP1_QUP3_SPI_APPS_CLK 34 461.1Sskrll#define GCC_BLSP1_QUP4_I2C_APPS_CLK 35 471.1Sskrll#define GCC_BLSP1_QUP4_SPI_APPS_CLK 36 481.1Sskrll#define GCC_BLSP1_QUP5_I2C_APPS_CLK 37 491.1Sskrll#define GCC_BLSP1_QUP5_SPI_APPS_CLK 38 501.1Sskrll#define GCC_BLSP1_QUP6_I2C_APPS_CLK 39 511.1Sskrll#define GCC_BLSP1_QUP6_SPI_APPS_CLK 40 521.1Sskrll#define GCC_BLSP1_UART1_APPS_CLK 41 531.1Sskrll#define GCC_BLSP1_UART2_APPS_CLK 42 541.1Sskrll#define GCC_BLSP1_UART3_APPS_CLK 43 551.1Sskrll#define GCC_BLSP1_UART4_APPS_CLK 44 561.1Sskrll#define GCC_BLSP1_UART5_APPS_CLK 45 571.1Sskrll#define GCC_BLSP1_UART6_APPS_CLK 46 581.1Sskrll#define PCIE0_AXI_M_CLK_SRC 47 591.1Sskrll#define GCC_PCIE0_AXI_M_CLK 48 601.1Sskrll#define PCIE1_AXI_M_CLK_SRC 49 611.1Sskrll#define GCC_PCIE1_AXI_M_CLK 50 621.1Sskrll#define PCIE2_AXI_M_CLK_SRC 51 631.1Sskrll#define GCC_PCIE2_AXI_M_CLK 52 641.1Sskrll#define PCIE3_AXI_M_CLK_SRC 53 651.1Sskrll#define GCC_PCIE3_AXI_M_CLK 54 661.1Sskrll#define PCIE0_AXI_S_CLK_SRC 55 671.1Sskrll#define GCC_PCIE0_AXI_S_BRIDGE_CLK 56 681.1Sskrll#define GCC_PCIE0_AXI_S_CLK 57 691.1Sskrll#define PCIE1_AXI_S_CLK_SRC 58 701.1Sskrll#define GCC_PCIE1_AXI_S_BRIDGE_CLK 59 711.1Sskrll#define GCC_PCIE1_AXI_S_CLK 60 721.1Sskrll#define PCIE2_AXI_S_CLK_SRC 61 731.1Sskrll#define GCC_PCIE2_AXI_S_BRIDGE_CLK 62 741.1Sskrll#define GCC_PCIE2_AXI_S_CLK 63 751.1Sskrll#define PCIE3_AXI_S_CLK_SRC 64 761.1Sskrll#define GCC_PCIE3_AXI_S_BRIDGE_CLK 65 771.1Sskrll#define GCC_PCIE3_AXI_S_CLK 66 781.1Sskrll#define PCIE0_PIPE_CLK_SRC 67 791.1Sskrll#define PCIE1_PIPE_CLK_SRC 68 801.1Sskrll#define PCIE2_PIPE_CLK_SRC 69 811.1Sskrll#define PCIE3_PIPE_CLK_SRC 70 821.1Sskrll#define PCIE_AUX_CLK_SRC 71 831.1Sskrll#define GCC_PCIE0_AUX_CLK 72 841.1Sskrll#define GCC_PCIE1_AUX_CLK 73 851.1Sskrll#define GCC_PCIE2_AUX_CLK 74 861.1Sskrll#define GCC_PCIE3_AUX_CLK 75 871.1Sskrll#define PCIE0_RCHNG_CLK_SRC 76 881.1Sskrll#define GCC_PCIE0_RCHNG_CLK 77 891.1Sskrll#define PCIE1_RCHNG_CLK_SRC 78 901.1Sskrll#define GCC_PCIE1_RCHNG_CLK 79 911.1Sskrll#define PCIE2_RCHNG_CLK_SRC 80 921.1Sskrll#define GCC_PCIE2_RCHNG_CLK 81 931.1Sskrll#define PCIE3_RCHNG_CLK_SRC 82 941.1Sskrll#define GCC_PCIE3_RCHNG_CLK 83 951.1Sskrll#define GCC_PCIE0_AHB_CLK 84 961.1Sskrll#define GCC_PCIE1_AHB_CLK 85 971.1Sskrll#define GCC_PCIE2_AHB_CLK 86 981.1Sskrll#define GCC_PCIE3_AHB_CLK 87 991.1Sskrll#define USB0_AUX_CLK_SRC 88 1001.1Sskrll#define GCC_USB0_AUX_CLK 89 1011.1Sskrll#define USB0_MASTER_CLK_SRC 90 1021.1Sskrll#define GCC_USB0_MASTER_CLK 91 1031.1Sskrll#define GCC_SNOC_USB_CLK 92 1041.1Sskrll#define GCC_ANOC_USB_AXI_CLK 93 1051.1Sskrll#define USB0_MOCK_UTMI_CLK_SRC 94 1061.1Sskrll#define USB0_MOCK_UTMI_DIV_CLK_SRC 95 1071.1Sskrll#define GCC_USB0_MOCK_UTMI_CLK 96 1081.1Sskrll#define USB0_PIPE_CLK_SRC 97 1091.1Sskrll#define GCC_USB0_PHY_CFG_AHB_CLK 98 1101.1Sskrll#define SDCC1_APPS_CLK_SRC 99 1111.1Sskrll#define GCC_SDCC1_APPS_CLK 100 1121.1Sskrll#define SDCC1_ICE_CORE_CLK_SRC 101 1131.1Sskrll#define GCC_SDCC1_ICE_CORE_CLK 102 1141.1Sskrll#define GCC_SDCC1_AHB_CLK 103 1151.1Sskrll#define PCNOC_BFDCD_CLK_SRC 104 1161.1Sskrll#define GCC_NSSCFG_CLK 105 1171.1Sskrll#define GCC_NSSNOC_NSSCC_CLK 106 1181.1Sskrll#define GCC_NSSCC_CLK 107 1191.1Sskrll#define GCC_NSSNOC_PCNOC_1_CLK 108 1201.1Sskrll#define GCC_QDSS_DAP_AHB_CLK 109 1211.1Sskrll#define GCC_QDSS_CFG_AHB_CLK 110 1221.1Sskrll#define GCC_QPIC_AHB_CLK 111 1231.1Sskrll#define GCC_QPIC_CLK 112 1241.1Sskrll#define GCC_BLSP1_AHB_CLK 113 1251.1Sskrll#define GCC_MDIO_AHB_CLK 114 1261.1Sskrll#define GCC_PRNG_AHB_CLK 115 1271.1Sskrll#define GCC_UNIPHY0_AHB_CLK 116 1281.1Sskrll#define GCC_UNIPHY1_AHB_CLK 117 1291.1Sskrll#define GCC_UNIPHY2_AHB_CLK 118 1301.1Sskrll#define GCC_CMN_12GPLL_AHB_CLK 119 1311.1Sskrll#define GCC_CMN_12GPLL_APU_CLK 120 1321.1Sskrll#define SYSTEM_NOC_BFDCD_CLK_SRC 121 1331.1Sskrll#define GCC_NSSNOC_SNOC_CLK 122 1341.1Sskrll#define GCC_NSSNOC_SNOC_1_CLK 123 1351.1Sskrll#define GCC_QDSS_ETR_USB_CLK 124 1361.1Sskrll#define WCSS_AHB_CLK_SRC 125 1371.1Sskrll#define GCC_Q6_AHB_CLK 126 1381.1Sskrll#define GCC_Q6_AHB_S_CLK 127 1391.1Sskrll#define GCC_WCSS_ECAHB_CLK 128 1401.1Sskrll#define GCC_WCSS_ACMT_CLK 129 1411.1Sskrll#define GCC_SYS_NOC_WCSS_AHB_CLK 130 1421.1Sskrll#define WCSS_AXI_M_CLK_SRC 131 1431.1Sskrll#define GCC_ANOC_WCSS_AXI_M_CLK 132 1441.1Sskrll#define QDSS_AT_CLK_SRC 133 1451.1Sskrll#define GCC_Q6SS_ATBM_CLK 134 1461.1Sskrll#define GCC_WCSS_DBG_IFC_ATB_CLK 135 1471.1Sskrll#define GCC_NSSNOC_ATB_CLK 136 1481.1Sskrll#define GCC_QDSS_AT_CLK 137 1491.1Sskrll#define GCC_SYS_NOC_AT_CLK 138 1501.1Sskrll#define GCC_PCNOC_AT_CLK 139 1511.1Sskrll#define GCC_USB0_EUD_AT_CLK 140 1521.1Sskrll#define GCC_QDSS_EUD_AT_CLK 141 1531.1Sskrll#define QDSS_STM_CLK_SRC 142 1541.1Sskrll#define GCC_QDSS_STM_CLK 143 1551.1Sskrll#define GCC_SYS_NOC_QDSS_STM_AXI_CLK 144 1561.1Sskrll#define QDSS_TRACECLKIN_CLK_SRC 145 1571.1Sskrll#define GCC_QDSS_TRACECLKIN_CLK 146 1581.1Sskrll#define QDSS_TSCTR_CLK_SRC 147 1591.1Sskrll#define GCC_Q6_TSCTR_1TO2_CLK 148 1601.1Sskrll#define GCC_WCSS_DBG_IFC_NTS_CLK 149 1611.1Sskrll#define GCC_QDSS_TSCTR_DIV2_CLK 150 1621.1Sskrll#define GCC_QDSS_TS_CLK 151 1631.1Sskrll#define GCC_QDSS_TSCTR_DIV4_CLK 152 1641.1Sskrll#define GCC_NSS_TS_CLK 153 1651.1Sskrll#define GCC_QDSS_TSCTR_DIV8_CLK 154 1661.1Sskrll#define GCC_QDSS_TSCTR_DIV16_CLK 155 1671.1Sskrll#define GCC_Q6SS_PCLKDBG_CLK 156 1681.1Sskrll#define GCC_Q6SS_TRIG_CLK 157 1691.1Sskrll#define GCC_WCSS_DBG_IFC_APB_CLK 158 1701.1Sskrll#define GCC_WCSS_DBG_IFC_DAPBUS_CLK 159 1711.1Sskrll#define GCC_QDSS_DAP_CLK 160 1721.1Sskrll#define GCC_QDSS_APB2JTAG_CLK 161 1731.1Sskrll#define GCC_QDSS_TSCTR_DIV3_CLK 162 1741.1Sskrll#define QPIC_IO_MACRO_CLK_SRC 163 1751.1Sskrll#define GCC_QPIC_IO_MACRO_CLK 164 1761.1Sskrll#define Q6_AXI_CLK_SRC 165 1771.1Sskrll#define GCC_Q6_AXIM_CLK 166 1781.1Sskrll#define GCC_WCSS_Q6_TBU_CLK 167 1791.1Sskrll#define GCC_MEM_NOC_Q6_AXI_CLK 168 1801.1Sskrll#define Q6_AXIM2_CLK_SRC 169 1811.1Sskrll#define NSSNOC_MEMNOC_BFDCD_CLK_SRC 170 1821.1Sskrll#define GCC_NSSNOC_MEMNOC_CLK 171 1831.1Sskrll#define GCC_NSSNOC_MEM_NOC_1_CLK 172 1841.1Sskrll#define GCC_NSS_TBU_CLK 173 1851.1Sskrll#define GCC_MEM_NOC_NSSNOC_CLK 174 1861.1Sskrll#define LPASS_AXIM_CLK_SRC 175 1871.1Sskrll#define LPASS_SWAY_CLK_SRC 176 1881.1Sskrll#define ADSS_PWM_CLK_SRC 177 1891.1Sskrll#define GCC_ADSS_PWM_CLK 178 1901.1Sskrll#define GP1_CLK_SRC 179 1911.1Sskrll#define GP2_CLK_SRC 180 1921.1Sskrll#define GP3_CLK_SRC 181 1931.1Sskrll#define DDRSS_SMS_SLOW_CLK_SRC 182 1941.1Sskrll#define GCC_XO_CLK_SRC 183 1951.1Sskrll#define GCC_XO_CLK 184 1961.1Sskrll#define GCC_NSSNOC_QOSGEN_REF_CLK 185 1971.1Sskrll#define GCC_NSSNOC_TIMEOUT_REF_CLK 186 1981.1Sskrll#define GCC_XO_DIV4_CLK 187 1991.1Sskrll#define GCC_UNIPHY0_SYS_CLK 188 2001.1Sskrll#define GCC_UNIPHY1_SYS_CLK 189 2011.1Sskrll#define GCC_UNIPHY2_SYS_CLK 190 2021.1Sskrll#define GCC_CMN_12GPLL_SYS_CLK 191 2031.1Sskrll#define GCC_NSSNOC_XO_DCD_CLK 192 2041.1Sskrll#define GCC_Q6SS_BOOT_CLK 193 2051.1Sskrll#define UNIPHY_SYS_CLK_SRC 194 2061.1Sskrll#define NSS_TS_CLK_SRC 195 2071.1Sskrll#define GCC_ANOC_PCIE0_1LANE_M_CLK 196 2081.1Sskrll#define GCC_ANOC_PCIE1_1LANE_M_CLK 197 2091.1Sskrll#define GCC_ANOC_PCIE2_2LANE_M_CLK 198 2101.1Sskrll#define GCC_ANOC_PCIE3_2LANE_M_CLK 199 2111.1Sskrll#define GCC_SNOC_PCIE0_1LANE_S_CLK 200 2121.1Sskrll#define GCC_SNOC_PCIE1_1LANE_S_CLK 201 2131.1Sskrll#define GCC_SNOC_PCIE2_2LANE_S_CLK 202 2141.1Sskrll#define GCC_SNOC_PCIE3_2LANE_S_CLK 203 2151.1Sskrll#define GCC_CRYPTO_CLK_SRC 204 2161.1Sskrll#define GCC_CRYPTO_CLK 205 2171.1Sskrll#define GCC_CRYPTO_AXI_CLK 206 2181.1Sskrll#define GCC_CRYPTO_AHB_CLK 207 2191.1Sskrll#define GCC_USB0_PIPE_CLK 208 2201.1Sskrll#define GCC_USB0_SLEEP_CLK 209 2211.1Sskrll#define GCC_PCIE0_PIPE_CLK 210 2221.1Sskrll#define GCC_PCIE1_PIPE_CLK 211 2231.1Sskrll#define GCC_PCIE2_PIPE_CLK 212 2241.1Sskrll#define GCC_PCIE3_PIPE_CLK 213 2251.1Sskrll#endif 226