qcom,mmcc-apq8084.h revision 1.1.1.1
1/* $NetBSD: qcom,mmcc-apq8084.h,v 1.1.1.1 2017/06/15 20:14:23 jmcneill Exp $ */ 2 3/* 4 * Copyright (c) 2014, The Linux Foundation. All rights reserved. 5 * 6 * This software is licensed under the terms of the GNU General Public 7 * License version 2, as published by the Free Software Foundation, and 8 * may be copied, distributed, and modified under those terms. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16#ifndef _DT_BINDINGS_CLK_APQ_MMCC_8084_H 17#define _DT_BINDINGS_CLK_APQ_MMCC_8084_H 18 19#define MMSS_AHB_CLK_SRC 0 20#define MMSS_AXI_CLK_SRC 1 21#define MMPLL0 2 22#define MMPLL0_VOTE 3 23#define MMPLL1 4 24#define MMPLL1_VOTE 5 25#define MMPLL2 6 26#define MMPLL3 7 27#define MMPLL4 8 28#define CSI0_CLK_SRC 9 29#define CSI1_CLK_SRC 10 30#define CSI2_CLK_SRC 11 31#define CSI3_CLK_SRC 12 32#define VCODEC0_CLK_SRC 13 33#define VFE0_CLK_SRC 14 34#define VFE1_CLK_SRC 15 35#define MDP_CLK_SRC 16 36#define PCLK0_CLK_SRC 17 37#define PCLK1_CLK_SRC 18 38#define OCMEMNOC_CLK_SRC 19 39#define GFX3D_CLK_SRC 20 40#define JPEG0_CLK_SRC 21 41#define JPEG1_CLK_SRC 22 42#define JPEG2_CLK_SRC 23 43#define EDPPIXEL_CLK_SRC 24 44#define EXTPCLK_CLK_SRC 25 45#define VP_CLK_SRC 26 46#define CCI_CLK_SRC 27 47#define CAMSS_GP0_CLK_SRC 28 48#define CAMSS_GP1_CLK_SRC 29 49#define MCLK0_CLK_SRC 30 50#define MCLK1_CLK_SRC 31 51#define MCLK2_CLK_SRC 32 52#define MCLK3_CLK_SRC 33 53#define CSI0PHYTIMER_CLK_SRC 34 54#define CSI1PHYTIMER_CLK_SRC 35 55#define CSI2PHYTIMER_CLK_SRC 36 56#define CPP_CLK_SRC 37 57#define BYTE0_CLK_SRC 38 58#define BYTE1_CLK_SRC 39 59#define EDPAUX_CLK_SRC 40 60#define EDPLINK_CLK_SRC 41 61#define ESC0_CLK_SRC 42 62#define ESC1_CLK_SRC 43 63#define HDMI_CLK_SRC 44 64#define VSYNC_CLK_SRC 45 65#define MMSS_RBCPR_CLK_SRC 46 66#define RBBMTIMER_CLK_SRC 47 67#define MAPLE_CLK_SRC 48 68#define VDP_CLK_SRC 49 69#define VPU_BUS_CLK_SRC 50 70#define MMSS_CXO_CLK 51 71#define MMSS_SLEEPCLK_CLK 52 72#define AVSYNC_AHB_CLK 53 73#define AVSYNC_EDPPIXEL_CLK 54 74#define AVSYNC_EXTPCLK_CLK 55 75#define AVSYNC_PCLK0_CLK 56 76#define AVSYNC_PCLK1_CLK 57 77#define AVSYNC_VP_CLK 58 78#define CAMSS_AHB_CLK 59 79#define CAMSS_CCI_CCI_AHB_CLK 60 80#define CAMSS_CCI_CCI_CLK 61 81#define CAMSS_CSI0_AHB_CLK 62 82#define CAMSS_CSI0_CLK 63 83#define CAMSS_CSI0PHY_CLK 64 84#define CAMSS_CSI0PIX_CLK 65 85#define CAMSS_CSI0RDI_CLK 66 86#define CAMSS_CSI1_AHB_CLK 67 87#define CAMSS_CSI1_CLK 68 88#define CAMSS_CSI1PHY_CLK 69 89#define CAMSS_CSI1PIX_CLK 70 90#define CAMSS_CSI1RDI_CLK 71 91#define CAMSS_CSI2_AHB_CLK 72 92#define CAMSS_CSI2_CLK 73 93#define CAMSS_CSI2PHY_CLK 74 94#define CAMSS_CSI2PIX_CLK 75 95#define CAMSS_CSI2RDI_CLK 76 96#define CAMSS_CSI3_AHB_CLK 77 97#define CAMSS_CSI3_CLK 78 98#define CAMSS_CSI3PHY_CLK 79 99#define CAMSS_CSI3PIX_CLK 80 100#define CAMSS_CSI3RDI_CLK 81 101#define CAMSS_CSI_VFE0_CLK 82 102#define CAMSS_CSI_VFE1_CLK 83 103#define CAMSS_GP0_CLK 84 104#define CAMSS_GP1_CLK 85 105#define CAMSS_ISPIF_AHB_CLK 86 106#define CAMSS_JPEG_JPEG0_CLK 87 107#define CAMSS_JPEG_JPEG1_CLK 88 108#define CAMSS_JPEG_JPEG2_CLK 89 109#define CAMSS_JPEG_JPEG_AHB_CLK 90 110#define CAMSS_JPEG_JPEG_AXI_CLK 91 111#define CAMSS_MCLK0_CLK 92 112#define CAMSS_MCLK1_CLK 93 113#define CAMSS_MCLK2_CLK 94 114#define CAMSS_MCLK3_CLK 95 115#define CAMSS_MICRO_AHB_CLK 96 116#define CAMSS_PHY0_CSI0PHYTIMER_CLK 97 117#define CAMSS_PHY1_CSI1PHYTIMER_CLK 98 118#define CAMSS_PHY2_CSI2PHYTIMER_CLK 99 119#define CAMSS_TOP_AHB_CLK 100 120#define CAMSS_VFE_CPP_AHB_CLK 101 121#define CAMSS_VFE_CPP_CLK 102 122#define CAMSS_VFE_VFE0_CLK 103 123#define CAMSS_VFE_VFE1_CLK 104 124#define CAMSS_VFE_VFE_AHB_CLK 105 125#define CAMSS_VFE_VFE_AXI_CLK 106 126#define MDSS_AHB_CLK 107 127#define MDSS_AXI_CLK 108 128#define MDSS_BYTE0_CLK 109 129#define MDSS_BYTE1_CLK 110 130#define MDSS_EDPAUX_CLK 111 131#define MDSS_EDPLINK_CLK 112 132#define MDSS_EDPPIXEL_CLK 113 133#define MDSS_ESC0_CLK 114 134#define MDSS_ESC1_CLK 115 135#define MDSS_EXTPCLK_CLK 116 136#define MDSS_HDMI_AHB_CLK 117 137#define MDSS_HDMI_CLK 118 138#define MDSS_MDP_CLK 119 139#define MDSS_MDP_LUT_CLK 120 140#define MDSS_PCLK0_CLK 121 141#define MDSS_PCLK1_CLK 122 142#define MDSS_VSYNC_CLK 123 143#define MMSS_RBCPR_AHB_CLK 124 144#define MMSS_RBCPR_CLK 125 145#define MMSS_SPDM_AHB_CLK 126 146#define MMSS_SPDM_AXI_CLK 127 147#define MMSS_SPDM_CSI0_CLK 128 148#define MMSS_SPDM_GFX3D_CLK 129 149#define MMSS_SPDM_JPEG0_CLK 130 150#define MMSS_SPDM_JPEG1_CLK 131 151#define MMSS_SPDM_JPEG2_CLK 132 152#define MMSS_SPDM_MDP_CLK 133 153#define MMSS_SPDM_PCLK0_CLK 134 154#define MMSS_SPDM_PCLK1_CLK 135 155#define MMSS_SPDM_VCODEC0_CLK 136 156#define MMSS_SPDM_VFE0_CLK 137 157#define MMSS_SPDM_VFE1_CLK 138 158#define MMSS_SPDM_RM_AXI_CLK 139 159#define MMSS_SPDM_RM_OCMEMNOC_CLK 140 160#define MMSS_MISC_AHB_CLK 141 161#define MMSS_MMSSNOC_AHB_CLK 142 162#define MMSS_MMSSNOC_BTO_AHB_CLK 143 163#define MMSS_MMSSNOC_AXI_CLK 144 164#define MMSS_S0_AXI_CLK 145 165#define OCMEMCX_AHB_CLK 146 166#define OCMEMCX_OCMEMNOC_CLK 147 167#define OXILI_OCMEMGX_CLK 148 168#define OXILI_GFX3D_CLK 149 169#define OXILI_RBBMTIMER_CLK 150 170#define OXILICX_AHB_CLK 151 171#define VENUS0_AHB_CLK 152 172#define VENUS0_AXI_CLK 153 173#define VENUS0_CORE0_VCODEC_CLK 154 174#define VENUS0_CORE1_VCODEC_CLK 155 175#define VENUS0_OCMEMNOC_CLK 156 176#define VENUS0_VCODEC0_CLK 157 177#define VPU_AHB_CLK 158 178#define VPU_AXI_CLK 159 179#define VPU_BUS_CLK 160 180#define VPU_CXO_CLK 161 181#define VPU_MAPLE_CLK 162 182#define VPU_SLEEP_CLK 163 183#define VPU_VDP_CLK 164 184 185/* GDSCs */ 186#define VENUS0_GDSC 0 187#define VENUS0_CORE0_GDSC 1 188#define VENUS0_CORE1_GDSC 2 189#define MDSS_GDSC 3 190#define CAMSS_JPEG_GDSC 4 191#define CAMSS_VFE_GDSC 5 192#define OXILI_GDSC 6 193#define OXILICX_GDSC 7 194 195#endif 196