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      1  1.1  jmcneill /*	$NetBSD: qcom,dispcc-sc7180.h,v 1.1.1.1 2021/11/07 16:49:58 jmcneill Exp $	*/
      2  1.1  jmcneill 
      3  1.1  jmcneill /* SPDX-License-Identifier: GPL-2.0-only */
      4  1.1  jmcneill /*
      5  1.1  jmcneill  * Copyright (c) 2019, The Linux Foundation. All rights reserved.
      6  1.1  jmcneill  */
      7  1.1  jmcneill 
      8  1.1  jmcneill #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7180_H
      9  1.1  jmcneill #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7180_H
     10  1.1  jmcneill 
     11  1.1  jmcneill #define DISP_CC_PLL0				0
     12  1.1  jmcneill #define DISP_CC_PLL0_OUT_EVEN			1
     13  1.1  jmcneill #define DISP_CC_MDSS_AHB_CLK			2
     14  1.1  jmcneill #define DISP_CC_MDSS_AHB_CLK_SRC		3
     15  1.1  jmcneill #define DISP_CC_MDSS_BYTE0_CLK			4
     16  1.1  jmcneill #define DISP_CC_MDSS_BYTE0_CLK_SRC		5
     17  1.1  jmcneill #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC		6
     18  1.1  jmcneill #define DISP_CC_MDSS_BYTE0_INTF_CLK		7
     19  1.1  jmcneill #define DISP_CC_MDSS_DP_AUX_CLK			8
     20  1.1  jmcneill #define DISP_CC_MDSS_DP_AUX_CLK_SRC		9
     21  1.1  jmcneill #define DISP_CC_MDSS_DP_CRYPTO_CLK		10
     22  1.1  jmcneill #define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC		11
     23  1.1  jmcneill #define DISP_CC_MDSS_DP_LINK_CLK		12
     24  1.1  jmcneill #define DISP_CC_MDSS_DP_LINK_CLK_SRC		13
     25  1.1  jmcneill #define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC	14
     26  1.1  jmcneill #define DISP_CC_MDSS_DP_LINK_INTF_CLK		15
     27  1.1  jmcneill #define DISP_CC_MDSS_DP_PIXEL_CLK		16
     28  1.1  jmcneill #define DISP_CC_MDSS_DP_PIXEL_CLK_SRC		17
     29  1.1  jmcneill #define DISP_CC_MDSS_ESC0_CLK			18
     30  1.1  jmcneill #define DISP_CC_MDSS_ESC0_CLK_SRC		19
     31  1.1  jmcneill #define DISP_CC_MDSS_MDP_CLK			20
     32  1.1  jmcneill #define DISP_CC_MDSS_MDP_CLK_SRC		21
     33  1.1  jmcneill #define DISP_CC_MDSS_MDP_LUT_CLK		22
     34  1.1  jmcneill #define DISP_CC_MDSS_NON_GDSC_AHB_CLK		23
     35  1.1  jmcneill #define DISP_CC_MDSS_PCLK0_CLK			24
     36  1.1  jmcneill #define DISP_CC_MDSS_PCLK0_CLK_SRC		25
     37  1.1  jmcneill #define DISP_CC_MDSS_ROT_CLK			26
     38  1.1  jmcneill #define DISP_CC_MDSS_ROT_CLK_SRC		27
     39  1.1  jmcneill #define DISP_CC_MDSS_RSCC_AHB_CLK		28
     40  1.1  jmcneill #define DISP_CC_MDSS_RSCC_VSYNC_CLK		29
     41  1.1  jmcneill #define DISP_CC_MDSS_VSYNC_CLK			30
     42  1.1  jmcneill #define DISP_CC_MDSS_VSYNC_CLK_SRC		31
     43  1.1  jmcneill #define DISP_CC_XO_CLK				32
     44  1.1  jmcneill 
     45  1.1  jmcneill /* DISP_CC GDSCR */
     46  1.1  jmcneill #define MDSS_GDSC				0
     47  1.1  jmcneill 
     48  1.1  jmcneill #endif
     49