11.1Sskrll/* $NetBSD: qcom,gcc-msm8976.h,v 1.1.1.1 2026/01/18 05:21:35 skrll Exp $ */ 21.1Sskrll 31.1Sskrll/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 41.1Sskrll/* 51.1Sskrll * Copyright (C) 2016, The Linux Foundation. All rights reserved. 61.1Sskrll * Copyright (C) 2016-2021, AngeloGioacchino Del Regno 71.1Sskrll * <angelogioacchino.delregno@somainline.org> 81.1Sskrll */ 91.1Sskrll 101.1Sskrll#ifndef _DT_BINDINGS_CLK_MSM_GCC_8976_H 111.1Sskrll#define _DT_BINDINGS_CLK_MSM_GCC_8976_H 121.1Sskrll 131.1Sskrll#define GPLL0 0 141.1Sskrll#define GPLL2 1 151.1Sskrll#define GPLL3 2 161.1Sskrll#define GPLL4 3 171.1Sskrll#define GPLL6 4 181.1Sskrll#define GPLL0_CLK_SRC 5 191.1Sskrll#define GPLL2_CLK_SRC 6 201.1Sskrll#define GPLL3_CLK_SRC 7 211.1Sskrll#define GPLL4_CLK_SRC 8 221.1Sskrll#define GPLL6_CLK_SRC 9 231.1Sskrll#define GCC_BLSP1_QUP1_SPI_APPS_CLK 10 241.1Sskrll#define GCC_BLSP1_QUP1_I2C_APPS_CLK 11 251.1Sskrll#define GCC_BLSP1_QUP2_I2C_APPS_CLK 12 261.1Sskrll#define GCC_BLSP1_QUP2_SPI_APPS_CLK 13 271.1Sskrll#define GCC_BLSP1_QUP3_I2C_APPS_CLK 14 281.1Sskrll#define GCC_BLSP1_QUP3_SPI_APPS_CLK 15 291.1Sskrll#define GCC_BLSP1_QUP4_I2C_APPS_CLK 16 301.1Sskrll#define GCC_BLSP1_QUP4_SPI_APPS_CLK 17 311.1Sskrll#define GCC_BLSP1_UART1_APPS_CLK 18 321.1Sskrll#define GCC_BLSP1_UART2_APPS_CLK 19 331.1Sskrll#define GCC_BLSP2_QUP1_I2C_APPS_CLK 20 341.1Sskrll#define GCC_BLSP2_QUP1_SPI_APPS_CLK 21 351.1Sskrll#define GCC_BLSP2_QUP2_I2C_APPS_CLK 22 361.1Sskrll#define GCC_BLSP2_QUP2_SPI_APPS_CLK 23 371.1Sskrll#define GCC_BLSP2_QUP3_I2C_APPS_CLK 24 381.1Sskrll#define GCC_BLSP2_QUP3_SPI_APPS_CLK 25 391.1Sskrll#define GCC_BLSP2_QUP4_I2C_APPS_CLK 26 401.1Sskrll#define GCC_BLSP2_QUP4_SPI_APPS_CLK 27 411.1Sskrll#define GCC_BLSP2_UART1_APPS_CLK 28 421.1Sskrll#define GCC_BLSP2_UART2_APPS_CLK 29 431.1Sskrll#define GCC_CAMSS_CCI_AHB_CLK 30 441.1Sskrll#define GCC_CAMSS_CCI_CLK 31 451.1Sskrll#define GCC_CAMSS_CPP_AHB_CLK 32 461.1Sskrll#define GCC_CAMSS_CPP_AXI_CLK 33 471.1Sskrll#define GCC_CAMSS_CPP_CLK 34 481.1Sskrll#define GCC_CAMSS_CSI0_AHB_CLK 35 491.1Sskrll#define GCC_CAMSS_CSI0_CLK 36 501.1Sskrll#define GCC_CAMSS_CSI0PHY_CLK 37 511.1Sskrll#define GCC_CAMSS_CSI0PIX_CLK 38 521.1Sskrll#define GCC_CAMSS_CSI0RDI_CLK 39 531.1Sskrll#define GCC_CAMSS_CSI1_AHB_CLK 40 541.1Sskrll#define GCC_CAMSS_CSI1_CLK 41 551.1Sskrll#define GCC_CAMSS_CSI1PHY_CLK 42 561.1Sskrll#define GCC_CAMSS_CSI1PIX_CLK 43 571.1Sskrll#define GCC_CAMSS_CSI1RDI_CLK 44 581.1Sskrll#define GCC_CAMSS_CSI2_AHB_CLK 45 591.1Sskrll#define GCC_CAMSS_CSI2_CLK 46 601.1Sskrll#define GCC_CAMSS_CSI2PHY_CLK 47 611.1Sskrll#define GCC_CAMSS_CSI2PIX_CLK 48 621.1Sskrll#define GCC_CAMSS_CSI2RDI_CLK 49 631.1Sskrll#define GCC_CAMSS_CSI_VFE0_CLK 50 641.1Sskrll#define GCC_CAMSS_CSI_VFE1_CLK 51 651.1Sskrll#define GCC_CAMSS_GP0_CLK 52 661.1Sskrll#define GCC_CAMSS_GP1_CLK 53 671.1Sskrll#define GCC_CAMSS_ISPIF_AHB_CLK 54 681.1Sskrll#define GCC_CAMSS_JPEG0_CLK 55 691.1Sskrll#define GCC_CAMSS_JPEG_AHB_CLK 56 701.1Sskrll#define GCC_CAMSS_JPEG_AXI_CLK 57 711.1Sskrll#define GCC_CAMSS_MCLK0_CLK 58 721.1Sskrll#define GCC_CAMSS_MCLK1_CLK 59 731.1Sskrll#define GCC_CAMSS_MCLK2_CLK 60 741.1Sskrll#define GCC_CAMSS_MICRO_AHB_CLK 61 751.1Sskrll#define GCC_CAMSS_CSI0PHYTIMER_CLK 62 761.1Sskrll#define GCC_CAMSS_CSI1PHYTIMER_CLK 63 771.1Sskrll#define GCC_CAMSS_AHB_CLK 64 781.1Sskrll#define GCC_CAMSS_TOP_AHB_CLK 65 791.1Sskrll#define GCC_CAMSS_VFE0_CLK 66 801.1Sskrll#define GCC_CAMSS_VFE_AHB_CLK 67 811.1Sskrll#define GCC_CAMSS_VFE_AXI_CLK 68 821.1Sskrll#define GCC_CAMSS_VFE1_AHB_CLK 69 831.1Sskrll#define GCC_CAMSS_VFE1_AXI_CLK 70 841.1Sskrll#define GCC_CAMSS_VFE1_CLK 71 851.1Sskrll#define GCC_DCC_CLK 72 861.1Sskrll#define GCC_GP1_CLK 73 871.1Sskrll#define GCC_GP2_CLK 74 881.1Sskrll#define GCC_GP3_CLK 75 891.1Sskrll#define GCC_MDSS_AHB_CLK 76 901.1Sskrll#define GCC_MDSS_AXI_CLK 77 911.1Sskrll#define GCC_MDSS_ESC0_CLK 78 921.1Sskrll#define GCC_MDSS_ESC1_CLK 79 931.1Sskrll#define GCC_MDSS_MDP_CLK 80 941.1Sskrll#define GCC_MDSS_VSYNC_CLK 81 951.1Sskrll#define GCC_MSS_CFG_AHB_CLK 82 961.1Sskrll#define GCC_MSS_Q6_BIMC_AXI_CLK 83 971.1Sskrll#define GCC_PDM2_CLK 84 981.1Sskrll#define GCC_PRNG_AHB_CLK 85 991.1Sskrll#define GCC_PDM_AHB_CLK 86 1001.1Sskrll#define GCC_RBCPR_GFX_AHB_CLK 87 1011.1Sskrll#define GCC_RBCPR_GFX_CLK 88 1021.1Sskrll#define GCC_SDCC1_AHB_CLK 89 1031.1Sskrll#define GCC_SDCC1_APPS_CLK 90 1041.1Sskrll#define GCC_SDCC1_ICE_CORE_CLK 91 1051.1Sskrll#define GCC_SDCC2_AHB_CLK 92 1061.1Sskrll#define GCC_SDCC2_APPS_CLK 93 1071.1Sskrll#define GCC_SDCC3_AHB_CLK 94 1081.1Sskrll#define GCC_SDCC3_APPS_CLK 95 1091.1Sskrll#define GCC_USB2A_PHY_SLEEP_CLK 96 1101.1Sskrll#define GCC_USB_HS_PHY_CFG_AHB_CLK 97 1111.1Sskrll#define GCC_USB_FS_AHB_CLK 98 1121.1Sskrll#define GCC_USB_FS_IC_CLK 99 1131.1Sskrll#define GCC_USB_FS_SYSTEM_CLK 100 1141.1Sskrll#define GCC_USB_HS_AHB_CLK 101 1151.1Sskrll#define GCC_USB_HS_SYSTEM_CLK 102 1161.1Sskrll#define GCC_VENUS0_AHB_CLK 103 1171.1Sskrll#define GCC_VENUS0_AXI_CLK 104 1181.1Sskrll#define GCC_VENUS0_CORE0_VCODEC0_CLK 105 1191.1Sskrll#define GCC_VENUS0_CORE1_VCODEC0_CLK 106 1201.1Sskrll#define GCC_VENUS0_VCODEC0_CLK 107 1211.1Sskrll#define GCC_APSS_AHB_CLK 108 1221.1Sskrll#define GCC_APSS_AXI_CLK 109 1231.1Sskrll#define GCC_BLSP1_AHB_CLK 110 1241.1Sskrll#define GCC_BLSP2_AHB_CLK 111 1251.1Sskrll#define GCC_BOOT_ROM_AHB_CLK 112 1261.1Sskrll#define GCC_CRYPTO_AHB_CLK 113 1271.1Sskrll#define GCC_CRYPTO_AXI_CLK 114 1281.1Sskrll#define GCC_CRYPTO_CLK 115 1291.1Sskrll#define GCC_CPP_TBU_CLK 116 1301.1Sskrll#define GCC_APSS_TCU_CLK 117 1311.1Sskrll#define GCC_JPEG_TBU_CLK 118 1321.1Sskrll#define GCC_MDP_RT_TBU_CLK 119 1331.1Sskrll#define GCC_MDP_TBU_CLK 120 1341.1Sskrll#define GCC_SMMU_CFG_CLK 121 1351.1Sskrll#define GCC_VENUS_1_TBU_CLK 122 1361.1Sskrll#define GCC_VENUS_TBU_CLK 123 1371.1Sskrll#define GCC_VFE1_TBU_CLK 124 1381.1Sskrll#define GCC_VFE_TBU_CLK 125 1391.1Sskrll#define GCC_APS_0_CLK 126 1401.1Sskrll#define GCC_APS_1_CLK 127 1411.1Sskrll#define APS_0_CLK_SRC 128 1421.1Sskrll#define APS_1_CLK_SRC 129 1431.1Sskrll#define APSS_AHB_CLK_SRC 130 1441.1Sskrll#define BLSP1_QUP1_I2C_APPS_CLK_SRC 131 1451.1Sskrll#define BLSP1_QUP1_SPI_APPS_CLK_SRC 132 1461.1Sskrll#define BLSP1_QUP2_I2C_APPS_CLK_SRC 133 1471.1Sskrll#define BLSP1_QUP2_SPI_APPS_CLK_SRC 134 1481.1Sskrll#define BLSP1_QUP3_I2C_APPS_CLK_SRC 135 1491.1Sskrll#define BLSP1_QUP3_SPI_APPS_CLK_SRC 136 1501.1Sskrll#define BLSP1_QUP4_I2C_APPS_CLK_SRC 137 1511.1Sskrll#define BLSP1_QUP4_SPI_APPS_CLK_SRC 138 1521.1Sskrll#define BLSP1_UART1_APPS_CLK_SRC 139 1531.1Sskrll#define BLSP1_UART2_APPS_CLK_SRC 140 1541.1Sskrll#define BLSP2_QUP1_I2C_APPS_CLK_SRC 141 1551.1Sskrll#define BLSP2_QUP1_SPI_APPS_CLK_SRC 142 1561.1Sskrll#define BLSP2_QUP2_I2C_APPS_CLK_SRC 143 1571.1Sskrll#define BLSP2_QUP2_SPI_APPS_CLK_SRC 144 1581.1Sskrll#define BLSP2_QUP3_I2C_APPS_CLK_SRC 145 1591.1Sskrll#define BLSP2_QUP3_SPI_APPS_CLK_SRC 146 1601.1Sskrll#define BLSP2_QUP4_I2C_APPS_CLK_SRC 147 1611.1Sskrll#define BLSP2_QUP4_SPI_APPS_CLK_SRC 148 1621.1Sskrll#define BLSP2_UART1_APPS_CLK_SRC 149 1631.1Sskrll#define BLSP2_UART2_APPS_CLK_SRC 150 1641.1Sskrll#define CCI_CLK_SRC 151 1651.1Sskrll#define CPP_CLK_SRC 152 1661.1Sskrll#define CSI0_CLK_SRC 153 1671.1Sskrll#define CSI1_CLK_SRC 154 1681.1Sskrll#define CSI2_CLK_SRC 155 1691.1Sskrll#define CAMSS_GP0_CLK_SRC 156 1701.1Sskrll#define CAMSS_GP1_CLK_SRC 157 1711.1Sskrll#define JPEG0_CLK_SRC 158 1721.1Sskrll#define MCLK0_CLK_SRC 159 1731.1Sskrll#define MCLK1_CLK_SRC 160 1741.1Sskrll#define MCLK2_CLK_SRC 161 1751.1Sskrll#define CSI0PHYTIMER_CLK_SRC 162 1761.1Sskrll#define CSI1PHYTIMER_CLK_SRC 163 1771.1Sskrll#define CAMSS_TOP_AHB_CLK_SRC 164 1781.1Sskrll#define VFE0_CLK_SRC 165 1791.1Sskrll#define VFE1_CLK_SRC 166 1801.1Sskrll#define CRYPTO_CLK_SRC 167 1811.1Sskrll#define GP1_CLK_SRC 168 1821.1Sskrll#define GP2_CLK_SRC 169 1831.1Sskrll#define GP3_CLK_SRC 170 1841.1Sskrll#define ESC0_CLK_SRC 171 1851.1Sskrll#define ESC1_CLK_SRC 172 1861.1Sskrll#define MDP_CLK_SRC 173 1871.1Sskrll#define VSYNC_CLK_SRC 174 1881.1Sskrll#define PDM2_CLK_SRC 175 1891.1Sskrll#define RBCPR_GFX_CLK_SRC 176 1901.1Sskrll#define SDCC1_APPS_CLK_SRC 177 1911.1Sskrll#define SDCC1_ICE_CORE_CLK_SRC 178 1921.1Sskrll#define SDCC2_APPS_CLK_SRC 179 1931.1Sskrll#define SDCC3_APPS_CLK_SRC 180 1941.1Sskrll#define USB_FS_IC_CLK_SRC 181 1951.1Sskrll#define USB_FS_SYSTEM_CLK_SRC 182 1961.1Sskrll#define USB_HS_SYSTEM_CLK_SRC 183 1971.1Sskrll#define VCODEC0_CLK_SRC 184 1981.1Sskrll#define GCC_MDSS_BYTE0_CLK_SRC 185 1991.1Sskrll#define GCC_MDSS_BYTE1_CLK_SRC 186 2001.1Sskrll#define GCC_MDSS_BYTE0_CLK 187 2011.1Sskrll#define GCC_MDSS_BYTE1_CLK 188 2021.1Sskrll#define GCC_MDSS_PCLK0_CLK_SRC 189 2031.1Sskrll#define GCC_MDSS_PCLK1_CLK_SRC 190 2041.1Sskrll#define GCC_MDSS_PCLK0_CLK 191 2051.1Sskrll#define GCC_MDSS_PCLK1_CLK 192 2061.1Sskrll#define GCC_GFX3D_CLK_SRC 193 2071.1Sskrll#define GCC_GFX3D_OXILI_CLK 194 2081.1Sskrll#define GCC_GFX3D_BIMC_CLK 195 2091.1Sskrll#define GCC_GFX3D_OXILI_AHB_CLK 196 2101.1Sskrll#define GCC_GFX3D_OXILI_AON_CLK 197 2111.1Sskrll#define GCC_GFX3D_OXILI_GMEM_CLK 198 2121.1Sskrll#define GCC_GFX3D_OXILI_TIMER_CLK 199 2131.1Sskrll#define GCC_GFX3D_TBU0_CLK 200 2141.1Sskrll#define GCC_GFX3D_TBU1_CLK 201 2151.1Sskrll#define GCC_GFX3D_TCU_CLK 202 2161.1Sskrll#define GCC_GFX3D_GTCU_AHB_CLK 203 2171.1Sskrll 2181.1Sskrll/* GCC block resets */ 2191.1Sskrll#define RST_CAMSS_MICRO_BCR 0 2201.1Sskrll#define RST_USB_HS_BCR 1 2211.1Sskrll#define RST_QUSB2_PHY_BCR 2 2221.1Sskrll#define RST_USB2_HS_PHY_ONLY_BCR 3 2231.1Sskrll#define RST_USB_HS_PHY_CFG_AHB_BCR 4 2241.1Sskrll#define RST_USB_FS_BCR 5 2251.1Sskrll#define RST_CAMSS_CSI1PIX_BCR 6 2261.1Sskrll#define RST_CAMSS_CSI_VFE1_BCR 7 2271.1Sskrll#define RST_CAMSS_VFE1_BCR 8 2281.1Sskrll#define RST_CAMSS_CPP_BCR 9 2291.1Sskrll#define RST_MSS_BCR 10 2301.1Sskrll 2311.1Sskrll/* GDSCs */ 2321.1Sskrll#define VENUS_GDSC 0 2331.1Sskrll#define VENUS_CORE0_GDSC 1 2341.1Sskrll#define VENUS_CORE1_GDSC 2 2351.1Sskrll#define MDSS_GDSC 3 2361.1Sskrll#define JPEG_GDSC 4 2371.1Sskrll#define VFE0_GDSC 5 2381.1Sskrll#define VFE1_GDSC 6 2391.1Sskrll#define CPP_GDSC 7 2401.1Sskrll#define OXILI_GX_GDSC 8 2411.1Sskrll#define OXILI_CX_GDSC 9 2421.1Sskrll 2431.1Sskrll#endif /* _DT_BINDINGS_CLK_MSM_GCC_8976_H */ 244