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      1  1.1  jmcneill /*	$NetBSD: qcom,gpucc-sm8250.h,v 1.1.1.1 2021/11/07 16:50:00 jmcneill Exp $	*/
      2  1.1  jmcneill 
      3  1.1  jmcneill /* SPDX-License-Identifier: GPL-2.0 */
      4  1.1  jmcneill /*
      5  1.1  jmcneill  * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
      6  1.1  jmcneill  */
      7  1.1  jmcneill 
      8  1.1  jmcneill #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8250_H
      9  1.1  jmcneill #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8250_H
     10  1.1  jmcneill 
     11  1.1  jmcneill /* GPU_CC clock registers */
     12  1.1  jmcneill #define GPU_CC_AHB_CLK				0
     13  1.1  jmcneill #define GPU_CC_CRC_AHB_CLK			1
     14  1.1  jmcneill #define GPU_CC_CX_APB_CLK			2
     15  1.1  jmcneill #define GPU_CC_CX_GMU_CLK			3
     16  1.1  jmcneill #define GPU_CC_CX_SNOC_DVM_CLK			4
     17  1.1  jmcneill #define GPU_CC_CXO_AON_CLK			5
     18  1.1  jmcneill #define GPU_CC_CXO_CLK				6
     19  1.1  jmcneill #define GPU_CC_GMU_CLK_SRC			7
     20  1.1  jmcneill #define GPU_CC_GX_GMU_CLK			8
     21  1.1  jmcneill #define GPU_CC_PLL1				9
     22  1.1  jmcneill #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK		10
     23  1.1  jmcneill 
     24  1.1  jmcneill /* GPU_CC Resets */
     25  1.1  jmcneill #define GPUCC_GPU_CC_ACD_BCR			0
     26  1.1  jmcneill #define GPUCC_GPU_CC_CX_BCR			1
     27  1.1  jmcneill #define GPUCC_GPU_CC_GFX3D_AON_BCR		2
     28  1.1  jmcneill #define GPUCC_GPU_CC_GMU_BCR			3
     29  1.1  jmcneill #define GPUCC_GPU_CC_GX_BCR			4
     30  1.1  jmcneill #define GPUCC_GPU_CC_XO_BCR			5
     31  1.1  jmcneill 
     32  1.1  jmcneill /* GPU_CC GDSCRs */
     33  1.1  jmcneill #define GPU_CX_GDSC				0
     34  1.1  jmcneill #define GPU_GX_GDSC				1
     35  1.1  jmcneill 
     36  1.1  jmcneill #endif
     37