11.1Sskrll/*	$NetBSD: qcom,gpucc-sm8350.h,v 1.1.1.1 2026/01/18 05:21:36 skrll Exp $	*/
21.1Sskrll
31.1Sskrll/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
41.1Sskrll/*
51.1Sskrll * Copyright (c) 2022, The Linux Foundation. All rights reserved.
61.1Sskrll */
71.1Sskrll
81.1Sskrll#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8350_H
91.1Sskrll#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8350_H
101.1Sskrll
111.1Sskrll/* GPU_CC clocks */
121.1Sskrll#define GPU_CC_AHB_CLK			0
131.1Sskrll#define GPU_CC_CB_CLK			1
141.1Sskrll#define GPU_CC_CRC_AHB_CLK		2
151.1Sskrll#define GPU_CC_CX_APB_CLK		3
161.1Sskrll#define GPU_CC_CX_GMU_CLK		4
171.1Sskrll#define GPU_CC_CX_QDSS_AT_CLK		5
181.1Sskrll#define GPU_CC_CX_QDSS_TRIG_CLK		6
191.1Sskrll#define GPU_CC_CX_QDSS_TSCTR_CLK	7
201.1Sskrll#define GPU_CC_CX_SNOC_DVM_CLK		8
211.1Sskrll#define GPU_CC_CXO_AON_CLK		9
221.1Sskrll#define GPU_CC_CXO_CLK			10
231.1Sskrll#define GPU_CC_FREQ_MEASURE_CLK		11
241.1Sskrll#define GPU_CC_GMU_CLK_SRC		12
251.1Sskrll#define GPU_CC_GX_GMU_CLK		13
261.1Sskrll#define GPU_CC_GX_QDSS_TSCTR_CLK	14
271.1Sskrll#define GPU_CC_GX_VSENSE_CLK		15
281.1Sskrll#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK	16
291.1Sskrll#define GPU_CC_HUB_AHB_DIV_CLK_SRC	17
301.1Sskrll#define GPU_CC_HUB_AON_CLK		18
311.1Sskrll#define GPU_CC_HUB_CLK_SRC		19
321.1Sskrll#define GPU_CC_HUB_CX_INT_CLK		20
331.1Sskrll#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC	21
341.1Sskrll#define GPU_CC_MND1X_0_GFX3D_CLK	22
351.1Sskrll#define GPU_CC_MND1X_1_GFX3D_CLK	23
361.1Sskrll#define GPU_CC_PLL0			24
371.1Sskrll#define GPU_CC_PLL1			25
381.1Sskrll#define GPU_CC_SLEEP_CLK		26
391.1Sskrll
401.1Sskrll/* GPU_CC resets */
411.1Sskrll#define GPUCC_GPU_CC_ACD_BCR		0
421.1Sskrll#define GPUCC_GPU_CC_CB_BCR		1
431.1Sskrll#define GPUCC_GPU_CC_CX_BCR		2
441.1Sskrll#define GPUCC_GPU_CC_FAST_HUB_BCR	3
451.1Sskrll#define GPUCC_GPU_CC_GFX3D_AON_BCR	4
461.1Sskrll#define GPUCC_GPU_CC_GMU_BCR		5
471.1Sskrll#define GPUCC_GPU_CC_GX_BCR		6
481.1Sskrll#define GPUCC_GPU_CC_XO_BCR		7
491.1Sskrll
501.1Sskrll/* GPU_CC GDSCRs */
511.1Sskrll#define GPU_CX_GDSC			0
521.1Sskrll#define GPU_GX_GDSC			1
531.1Sskrll
541.1Sskrll#endif
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