1 /* $NetBSD: r8a7743-cpg-mssr.h,v 1.1 2017/06/15 20:14:23 jmcneill Exp $ */ 2 3 /* 4 * Copyright (C) 2016 Cogent Embedded Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 #ifndef __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ 12 #define __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ 13 14 #include <dt-bindings/clock/renesas-cpg-mssr.h> 15 16 /* r8a7743 CPG Core Clocks */ 17 #define R8A7743_CLK_Z 0 18 #define R8A7743_CLK_ZG 1 19 #define R8A7743_CLK_ZTR 2 20 #define R8A7743_CLK_ZTRD2 3 21 #define R8A7743_CLK_ZT 4 22 #define R8A7743_CLK_ZX 5 23 #define R8A7743_CLK_ZS 6 24 #define R8A7743_CLK_HP 7 25 #define R8A7743_CLK_B 9 26 #define R8A7743_CLK_LB 10 27 #define R8A7743_CLK_P 11 28 #define R8A7743_CLK_CL 12 29 #define R8A7743_CLK_M2 13 30 #define R8A7743_CLK_ZB3 15 31 #define R8A7743_CLK_ZB3D2 16 32 #define R8A7743_CLK_DDR 17 33 #define R8A7743_CLK_SDH 18 34 #define R8A7743_CLK_SD0 19 35 #define R8A7743_CLK_SD2 20 36 #define R8A7743_CLK_SD3 21 37 #define R8A7743_CLK_MMC0 22 38 #define R8A7743_CLK_MP 23 39 #define R8A7743_CLK_QSPI 26 40 #define R8A7743_CLK_CP 27 41 #define R8A7743_CLK_RCAN 28 42 #define R8A7743_CLK_R 29 43 #define R8A7743_CLK_OSC 30 44 45 #endif /* __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ */ 46