r8a7792-clock.h revision 1.1.1.2
1/* $NetBSD: r8a7792-clock.h,v 1.1.1.2 2017/07/27 18:10:50 jmcneill Exp $ */ 2 3/* 4 * Copyright (C) 2016 Cogent Embedded, Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12#ifndef __DT_BINDINGS_CLOCK_R8A7792_H__ 13#define __DT_BINDINGS_CLOCK_R8A7792_H__ 14 15/* CPG */ 16#define R8A7792_CLK_MAIN 0 17#define R8A7792_CLK_PLL0 1 18#define R8A7792_CLK_PLL1 2 19#define R8A7792_CLK_PLL3 3 20#define R8A7792_CLK_LB 4 21#define R8A7792_CLK_QSPI 5 22 23/* MSTP0 */ 24#define R8A7792_CLK_MSIOF0 0 25 26/* MSTP1 */ 27#define R8A7792_CLK_JPU 6 28#define R8A7792_CLK_TMU1 11 29#define R8A7792_CLK_TMU3 21 30#define R8A7792_CLK_TMU2 22 31#define R8A7792_CLK_CMT0 24 32#define R8A7792_CLK_TMU0 25 33#define R8A7792_CLK_VSP1DU1 27 34#define R8A7792_CLK_VSP1DU0 28 35#define R8A7792_CLK_VSP1_SY 31 36 37/* MSTP2 */ 38#define R8A7792_CLK_MSIOF1 8 39#define R8A7792_CLK_SYS_DMAC1 18 40#define R8A7792_CLK_SYS_DMAC0 19 41 42/* MSTP3 */ 43#define R8A7792_CLK_TPU0 4 44#define R8A7792_CLK_SDHI0 14 45#define R8A7792_CLK_CMT1 29 46 47/* MSTP4 */ 48#define R8A7792_CLK_IRQC 7 49#define R8A7792_CLK_INTC_SYS 8 50 51/* MSTP5 */ 52#define R8A7792_CLK_AUDIO_DMAC0 2 53#define R8A7792_CLK_THERMAL 22 54#define R8A7792_CLK_PWM 23 55 56/* MSTP7 */ 57#define R8A7792_CLK_HSCIF1 16 58#define R8A7792_CLK_HSCIF0 17 59#define R8A7792_CLK_SCIF3 18 60#define R8A7792_CLK_SCIF2 19 61#define R8A7792_CLK_SCIF1 20 62#define R8A7792_CLK_SCIF0 21 63#define R8A7792_CLK_DU1 23 64#define R8A7792_CLK_DU0 24 65 66/* MSTP8 */ 67#define R8A7792_CLK_VIN5 4 68#define R8A7792_CLK_VIN4 5 69#define R8A7792_CLK_VIN3 8 70#define R8A7792_CLK_VIN2 9 71#define R8A7792_CLK_VIN1 10 72#define R8A7792_CLK_VIN0 11 73#define R8A7792_CLK_ETHERAVB 12 74 75/* MSTP9 */ 76#define R8A7792_CLK_GPIO7 4 77#define R8A7792_CLK_GPIO6 5 78#define R8A7792_CLK_GPIO5 7 79#define R8A7792_CLK_GPIO4 8 80#define R8A7792_CLK_GPIO3 9 81#define R8A7792_CLK_GPIO2 10 82#define R8A7792_CLK_GPIO1 11 83#define R8A7792_CLK_GPIO0 12 84#define R8A7792_CLK_GPIO11 13 85#define R8A7792_CLK_GPIO10 14 86#define R8A7792_CLK_CAN1 15 87#define R8A7792_CLK_CAN0 16 88#define R8A7792_CLK_QSPI_MOD 17 89#define R8A7792_CLK_GPIO9 19 90#define R8A7792_CLK_GPIO8 21 91#define R8A7792_CLK_I2C5 25 92#define R8A7792_CLK_IICDVFS 26 93#define R8A7792_CLK_I2C4 27 94#define R8A7792_CLK_I2C3 28 95#define R8A7792_CLK_I2C2 29 96#define R8A7792_CLK_I2C1 30 97#define R8A7792_CLK_I2C0 31 98 99/* MSTP10 */ 100#define R8A7792_CLK_SSI_ALL 5 101#define R8A7792_CLK_SSI4 11 102#define R8A7792_CLK_SSI3 12 103 104#endif /* __DT_BINDINGS_CLOCK_R8A7792_H__ */ 105