r8a7793-clock.h revision 1.1.1.2 
1/*	$NetBSD: r8a7793-clock.h,v 1.1.1.2 2017/07/27 18:10:50 jmcneill Exp $	*/
2
3/*
4 * r8a7793 clock definition
5 *
6 * Copyright (C) 2014  Renesas Electronics Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 */
17
18#ifndef __DT_BINDINGS_CLOCK_R8A7793_H__
19#define __DT_BINDINGS_CLOCK_R8A7793_H__
20
21/* CPG */
22#define R8A7793_CLK_MAIN		0
23#define R8A7793_CLK_PLL0		1
24#define R8A7793_CLK_PLL1		2
25#define R8A7793_CLK_PLL3		3
26#define R8A7793_CLK_LB			4
27#define R8A7793_CLK_QSPI		5
28#define R8A7793_CLK_SDH			6
29#define R8A7793_CLK_SD0			7
30#define R8A7793_CLK_Z			8
31#define R8A7793_CLK_RCAN		9
32#define R8A7793_CLK_ADSP		10
33
34/* MSTP0 */
35#define R8A7793_CLK_MSIOF0		0
36
37/* MSTP1 */
38#define R8A7793_CLK_VCP0		1
39#define R8A7793_CLK_VPC0		3
40#define R8A7793_CLK_SSP1		9
41#define R8A7793_CLK_TMU1		11
42#define R8A7793_CLK_3DG			12
43#define R8A7793_CLK_2DDMAC		15
44#define R8A7793_CLK_FDP1_1		18
45#define R8A7793_CLK_FDP1_0		19
46#define R8A7793_CLK_TMU3		21
47#define R8A7793_CLK_TMU2		22
48#define R8A7793_CLK_CMT0		24
49#define R8A7793_CLK_TMU0		25
50#define R8A7793_CLK_VSP1_DU1		27
51#define R8A7793_CLK_VSP1_DU0		28
52#define R8A7793_CLK_VSP1_S		31
53
54/* MSTP2 */
55#define R8A7793_CLK_SCIFA2		2
56#define R8A7793_CLK_SCIFA1		3
57#define R8A7793_CLK_SCIFA0		4
58#define R8A7793_CLK_MSIOF2		5
59#define R8A7793_CLK_SCIFB0		6
60#define R8A7793_CLK_SCIFB1		7
61#define R8A7793_CLK_MSIOF1		8
62#define R8A7793_CLK_SCIFB2		16
63#define R8A7793_CLK_SYS_DMAC1		18
64#define R8A7793_CLK_SYS_DMAC0		19
65
66/* MSTP3 */
67#define R8A7793_CLK_TPU0		4
68#define R8A7793_CLK_SDHI2		11
69#define R8A7793_CLK_SDHI1		12
70#define R8A7793_CLK_SDHI0		14
71#define R8A7793_CLK_MMCIF0		15
72#define R8A7793_CLK_IIC0		18
73#define R8A7793_CLK_PCIEC		19
74#define R8A7793_CLK_IIC1		23
75#define R8A7793_CLK_SSUSB		28
76#define R8A7793_CLK_CMT1		29
77#define R8A7793_CLK_USBDMAC0		30
78#define R8A7793_CLK_USBDMAC1		31
79
80/* MSTP4 */
81#define R8A7793_CLK_IRQC		7
82#define R8A7793_CLK_INTC_SYS		8
83
84/* MSTP5 */
85#define R8A7793_CLK_AUDIO_DMAC1		1
86#define R8A7793_CLK_AUDIO_DMAC0		2
87#define R8A7793_CLK_ADSP_MOD		6
88#define R8A7793_CLK_THERMAL		22
89#define R8A7793_CLK_PWM			23
90
91/* MSTP7 */
92#define R8A7793_CLK_EHCI		3
93#define R8A7793_CLK_HSUSB		4
94#define R8A7793_CLK_HSCIF2		13
95#define R8A7793_CLK_SCIF5		14
96#define R8A7793_CLK_SCIF4		15
97#define R8A7793_CLK_HSCIF1		16
98#define R8A7793_CLK_HSCIF0		17
99#define R8A7793_CLK_SCIF3		18
100#define R8A7793_CLK_SCIF2		19
101#define R8A7793_CLK_SCIF1		20
102#define R8A7793_CLK_SCIF0		21
103#define R8A7793_CLK_DU1			23
104#define R8A7793_CLK_DU0			24
105#define R8A7793_CLK_LVDS0		26
106
107/* MSTP8 */
108#define R8A7793_CLK_IPMMU_SGX		0
109#define R8A7793_CLK_VIN2		9
110#define R8A7793_CLK_VIN1		10
111#define R8A7793_CLK_VIN0		11
112#define R8A7793_CLK_ETHER		13
113#define R8A7793_CLK_SATA1		14
114#define R8A7793_CLK_SATA0		15
115
116/* MSTP9 */
117#define R8A7793_CLK_GPIO7		4
118#define R8A7793_CLK_GPIO6		5
119#define R8A7793_CLK_GPIO5		7
120#define R8A7793_CLK_GPIO4		8
121#define R8A7793_CLK_GPIO3		9
122#define R8A7793_CLK_GPIO2		10
123#define R8A7793_CLK_GPIO1		11
124#define R8A7793_CLK_GPIO0		12
125#define R8A7793_CLK_RCAN1		15
126#define R8A7793_CLK_RCAN0		16
127#define R8A7793_CLK_QSPI_MOD		17
128#define R8A7793_CLK_I2C5		25
129#define R8A7793_CLK_IICDVFS		26
130#define R8A7793_CLK_I2C4		27
131#define R8A7793_CLK_I2C3		28
132#define R8A7793_CLK_I2C2		29
133#define R8A7793_CLK_I2C1		30
134#define R8A7793_CLK_I2C0		31
135
136/* MSTP10 */
137#define R8A7793_CLK_SSI_ALL		5
138#define R8A7793_CLK_SSI9		6
139#define R8A7793_CLK_SSI8		7
140#define R8A7793_CLK_SSI7		8
141#define R8A7793_CLK_SSI6		9
142#define R8A7793_CLK_SSI5		10
143#define R8A7793_CLK_SSI4		11
144#define R8A7793_CLK_SSI3		12
145#define R8A7793_CLK_SSI2		13
146#define R8A7793_CLK_SSI1		14
147#define R8A7793_CLK_SSI0		15
148#define R8A7793_CLK_SCU_ALL		17
149#define R8A7793_CLK_SCU_DVC1		18
150#define R8A7793_CLK_SCU_DVC0		19
151#define R8A7793_CLK_SCU_CTU1_MIX1	20
152#define R8A7793_CLK_SCU_CTU0_MIX0	21
153#define R8A7793_CLK_SCU_SRC9		22
154#define R8A7793_CLK_SCU_SRC8		23
155#define R8A7793_CLK_SCU_SRC7		24
156#define R8A7793_CLK_SCU_SRC6		25
157#define R8A7793_CLK_SCU_SRC5		26
158#define R8A7793_CLK_SCU_SRC4		27
159#define R8A7793_CLK_SCU_SRC3		28
160#define R8A7793_CLK_SCU_SRC2		29
161#define R8A7793_CLK_SCU_SRC1		30
162#define R8A7793_CLK_SCU_SRC0		31
163
164/* MSTP11 */
165#define R8A7793_CLK_SCIFA3		6
166#define R8A7793_CLK_SCIFA4		7
167#define R8A7793_CLK_SCIFA5		8
168
169#endif /* __DT_BINDINGS_CLOCK_R8A7793_H__ */
170