renesas,r9a09g057-cpg.h revision 1.1.1.1 
1/*	$NetBSD: renesas,r9a09g057-cpg.h,v 1.1.1.1 2026/01/18 05:21:38 skrll Exp $	*/
2
3/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 *
5 * Copyright (C) 2024 Renesas Electronics Corp.
6 */
7#ifndef __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__
8#define __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__
9
10#include <dt-bindings/clock/renesas-cpg-mssr.h>
11
12/* Core Clock list */
13#define R9A09G057_SYS_0_PCLK			0
14#define R9A09G057_CA55_0_CORE_CLK0		1
15#define R9A09G057_CA55_0_CORE_CLK1		2
16#define R9A09G057_CA55_0_CORE_CLK2		3
17#define R9A09G057_CA55_0_CORE_CLK3		4
18#define R9A09G057_CA55_0_PERIPHCLK		5
19#define R9A09G057_CM33_CLK0			6
20#define R9A09G057_CST_0_SWCLKTCK		7
21#define R9A09G057_IOTOP_0_SHCLK			8
22
23#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__ */
24