11.1Sskrll/* $NetBSD: renesas,r9a09g057-cpg.h,v 1.1.1.1 2026/01/18 05:21:38 skrll Exp $ */ 21.1Sskrll 31.1Sskrll/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 41.1Sskrll * 51.1Sskrll * Copyright (C) 2024 Renesas Electronics Corp. 61.1Sskrll */ 71.1Sskrll#ifndef __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__ 81.1Sskrll#define __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__ 91.1Sskrll 101.1Sskrll#include <dt-bindings/clock/renesas-cpg-mssr.h> 111.1Sskrll 121.1Sskrll/* Core Clock list */ 131.1Sskrll#define R9A09G057_SYS_0_PCLK 0 141.1Sskrll#define R9A09G057_CA55_0_CORE_CLK0 1 151.1Sskrll#define R9A09G057_CA55_0_CORE_CLK1 2 161.1Sskrll#define R9A09G057_CA55_0_CORE_CLK2 3 171.1Sskrll#define R9A09G057_CA55_0_CORE_CLK3 4 181.1Sskrll#define R9A09G057_CA55_0_PERIPHCLK 5 191.1Sskrll#define R9A09G057_CM33_CLK0 6 201.1Sskrll#define R9A09G057_CST_0_SWCLKTCK 7 211.1Sskrll#define R9A09G057_IOTOP_0_SHCLK 8 221.1Sskrll 231.1Sskrll#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__ */ 24