1 1.1 jmcneill /* $NetBSD: rk3188-cru.h,v 1.1.1.2 2020/01/03 14:33:06 skrll Exp $ */ 2 1.1 jmcneill 3 1.1.1.2 skrll /* SPDX-License-Identifier: GPL-2.0-or-later */ 4 1.1 jmcneill /* 5 1.1 jmcneill * Copyright (c) 2014 MundoReader S.L. 6 1.1 jmcneill * Author: Heiko Stuebner <heiko (at) sntech.de> 7 1.1 jmcneill */ 8 1.1 jmcneill 9 1.1 jmcneill #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H 10 1.1 jmcneill #define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H 11 1.1 jmcneill 12 1.1 jmcneill #include <dt-bindings/clock/rk3188-cru-common.h> 13 1.1 jmcneill 14 1.1 jmcneill /* soft-reset indices */ 15 1.1 jmcneill #define SRST_PTM_CORE2 0 16 1.1 jmcneill #define SRST_PTM_CORE3 1 17 1.1 jmcneill #define SRST_CORE2 5 18 1.1 jmcneill #define SRST_CORE3 6 19 1.1 jmcneill #define SRST_CORE2_DBG 10 20 1.1 jmcneill #define SRST_CORE3_DBG 11 21 1.1 jmcneill 22 1.1 jmcneill #define SRST_TIMER2 16 23 1.1 jmcneill #define SRST_TIMER4 23 24 1.1 jmcneill #define SRST_I2S0 24 25 1.1 jmcneill #define SRST_TIMER5 25 26 1.1 jmcneill #define SRST_TIMER3 29 27 1.1 jmcneill #define SRST_TIMER6 31 28 1.1 jmcneill 29 1.1 jmcneill #define SRST_PTM3 36 30 1.1 jmcneill #define SRST_PTM3_ATB 37 31 1.1 jmcneill 32 1.1 jmcneill #define SRST_GPS 67 33 1.1 jmcneill #define SRST_HSICPHY 75 34 1.1 jmcneill #define SRST_TIMER 78 35 1.1 jmcneill 36 1.1 jmcneill #define SRST_PTM2 92 37 1.1 jmcneill #define SRST_CORE2_WDT 94 38 1.1 jmcneill #define SRST_CORE3_WDT 95 39 1.1 jmcneill 40 1.1 jmcneill #define SRST_PTM2_ATB 111 41 1.1 jmcneill 42 1.1 jmcneill #define SRST_HSIC 117 43 1.1 jmcneill #define SRST_CTI2 118 44 1.1 jmcneill #define SRST_CTI2_APB 119 45 1.1 jmcneill #define SRST_GPU_BRIDGE 121 46 1.1 jmcneill #define SRST_CTI3 123 47 1.1 jmcneill #define SRST_CTI3_APB 124 48 1.1 jmcneill 49 1.1 jmcneill #endif 50