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sh73a0-clock.h revision 1.1.1.1.6.2 
      1 /*	$NetBSD: sh73a0-clock.h,v 1.1.1.1.6.2 2017/08/28 17:53:01 skrll Exp $	*/
      2 
      3 /*
      4  * Copyright 2014 Ulrich Hecht
      5  *
      6  * This program is free software; you can redistribute it and/or modify
      7  * it under the terms of the GNU General Public License as published by
      8  * the Free Software Foundation; either version 2 of the License, or
      9  * (at your option) any later version.
     10  */
     11 
     12 #ifndef __DT_BINDINGS_CLOCK_SH73A0_H__
     13 #define __DT_BINDINGS_CLOCK_SH73A0_H__
     14 
     15 /* CPG */
     16 #define SH73A0_CLK_MAIN		0
     17 #define SH73A0_CLK_PLL0		1
     18 #define SH73A0_CLK_PLL1		2
     19 #define SH73A0_CLK_PLL2		3
     20 #define SH73A0_CLK_PLL3		4
     21 #define SH73A0_CLK_DSI0PHY	5
     22 #define SH73A0_CLK_DSI1PHY	6
     23 #define SH73A0_CLK_ZG		7
     24 #define SH73A0_CLK_M3		8
     25 #define SH73A0_CLK_B		9
     26 #define SH73A0_CLK_M1		10
     27 #define SH73A0_CLK_M2		11
     28 #define SH73A0_CLK_Z		12
     29 #define SH73A0_CLK_ZX		13
     30 #define SH73A0_CLK_HP		14
     31 
     32 /* MSTP0 */
     33 #define SH73A0_CLK_IIC2		1
     34 #define SH73A0_CLK_MSIOF0	0
     35 
     36 /* MSTP1 */
     37 #define SH73A0_CLK_CEU1		29
     38 #define SH73A0_CLK_CSI2_RX1	28
     39 #define SH73A0_CLK_CEU0		27
     40 #define SH73A0_CLK_CSI2_RX0	26
     41 #define SH73A0_CLK_TMU0		25
     42 #define SH73A0_CLK_DSITX0	18
     43 #define SH73A0_CLK_IIC0		16
     44 #define SH73A0_CLK_SGX		12
     45 #define SH73A0_CLK_LCDC0	0
     46 
     47 /* MSTP2 */
     48 #define SH73A0_CLK_SCIFA7	19
     49 #define SH73A0_CLK_SY_DMAC	18
     50 #define SH73A0_CLK_MP_DMAC	17
     51 #define SH73A0_CLK_MSIOF3	15
     52 #define SH73A0_CLK_MSIOF1	8
     53 #define SH73A0_CLK_SCIFA5	7
     54 #define SH73A0_CLK_SCIFB	6
     55 #define SH73A0_CLK_MSIOF2	5
     56 #define SH73A0_CLK_SCIFA0	4
     57 #define SH73A0_CLK_SCIFA1	3
     58 #define SH73A0_CLK_SCIFA2	2
     59 #define SH73A0_CLK_SCIFA3	1
     60 #define SH73A0_CLK_SCIFA4	0
     61 
     62 /* MSTP3 */
     63 #define SH73A0_CLK_SCIFA6	31
     64 #define SH73A0_CLK_CMT1		29
     65 #define SH73A0_CLK_FSI		28
     66 #define SH73A0_CLK_IRDA		25
     67 #define SH73A0_CLK_IIC1		23
     68 #define SH73A0_CLK_USB		22
     69 #define SH73A0_CLK_FLCTL	15
     70 #define SH73A0_CLK_SDHI0	14
     71 #define SH73A0_CLK_SDHI1	13
     72 #define SH73A0_CLK_MMCIF0	12
     73 #define SH73A0_CLK_SDHI2	11
     74 #define SH73A0_CLK_TPU0		4
     75 #define SH73A0_CLK_TPU1		3
     76 #define SH73A0_CLK_TPU2		2
     77 #define SH73A0_CLK_TPU3		1
     78 #define SH73A0_CLK_TPU4		0
     79 
     80 /* MSTP4 */
     81 #define SH73A0_CLK_IIC3		11
     82 #define SH73A0_CLK_IIC4		10
     83 #define SH73A0_CLK_KEYSC	3
     84 
     85 /* MSTP5 */
     86 #define SH73A0_CLK_INTCA0	8
     87 
     88 #endif
     89