1 1.1 skrll /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 2 1.1 skrll /* 3 1.1 skrll * Copyright (C) 2021 Emil Renner Berthing <kernel (at) esmil.dk> 4 1.1 skrll */ 5 1.1 skrll 6 1.1 skrll #ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__ 7 1.1 skrll #define __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__ 8 1.1 skrll 9 1.1 skrll #define JH7100_AUDCLK_ADC_MCLK 0 10 1.1 skrll #define JH7100_AUDCLK_I2S1_MCLK 1 11 1.1 skrll #define JH7100_AUDCLK_I2SADC_APB 2 12 1.1 skrll #define JH7100_AUDCLK_I2SADC_BCLK 3 13 1.1 skrll #define JH7100_AUDCLK_I2SADC_BCLK_N 4 14 1.1 skrll #define JH7100_AUDCLK_I2SADC_LRCLK 5 15 1.1 skrll #define JH7100_AUDCLK_PDM_APB 6 16 1.1 skrll #define JH7100_AUDCLK_PDM_MCLK 7 17 1.1 skrll #define JH7100_AUDCLK_I2SVAD_APB 8 18 1.1 skrll #define JH7100_AUDCLK_SPDIF 9 19 1.1 skrll #define JH7100_AUDCLK_SPDIF_APB 10 20 1.1 skrll #define JH7100_AUDCLK_PWMDAC_APB 11 21 1.1 skrll #define JH7100_AUDCLK_DAC_MCLK 12 22 1.1 skrll #define JH7100_AUDCLK_I2SDAC_APB 13 23 1.1 skrll #define JH7100_AUDCLK_I2SDAC_BCLK 14 24 1.1 skrll #define JH7100_AUDCLK_I2SDAC_BCLK_N 15 25 1.1 skrll #define JH7100_AUDCLK_I2SDAC_LRCLK 16 26 1.1 skrll #define JH7100_AUDCLK_I2S1_APB 17 27 1.1 skrll #define JH7100_AUDCLK_I2S1_BCLK 18 28 1.1 skrll #define JH7100_AUDCLK_I2S1_BCLK_N 19 29 1.1 skrll #define JH7100_AUDCLK_I2S1_LRCLK 20 30 1.1 skrll #define JH7100_AUDCLK_I2SDAC16K_APB 21 31 1.1 skrll #define JH7100_AUDCLK_APB0_BUS 22 32 1.1 skrll #define JH7100_AUDCLK_DMA1P_AHB 23 33 1.1 skrll #define JH7100_AUDCLK_USB_APB 24 34 1.1 skrll #define JH7100_AUDCLK_USB_LPM 25 35 1.1 skrll #define JH7100_AUDCLK_USB_STB 26 36 1.1 skrll #define JH7100_AUDCLK_APB_EN 27 37 1.1 skrll #define JH7100_AUDCLK_VAD_MEM 28 38 1.1 skrll 39 1.1 skrll #define JH7100_AUDCLK_END 29 40 1.1 skrll 41 1.1 skrll #endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__ */ 42