Home | History | Annotate | Line # | Download | only in clock
      1      1.1  jmcneill /*	$NetBSD: stih418-clks.h,v 1.1.1.2 2017/11/30 19:40:51 jmcneill Exp $	*/
      2      1.1  jmcneill 
      3  1.1.1.2  jmcneill /* SPDX-License-Identifier: GPL-2.0 */
      4      1.1  jmcneill /*
      5      1.1  jmcneill  * This header provides constants clk index STMicroelectronics
      6      1.1  jmcneill  * STiH418 SoC.
      7      1.1  jmcneill  */
      8      1.1  jmcneill #ifndef _DT_BINDINGS_CLK_STIH418
      9      1.1  jmcneill #define _DT_BINDINGS_CLK_STIH418
     10      1.1  jmcneill 
     11      1.1  jmcneill #include "stih410-clks.h"
     12      1.1  jmcneill 
     13      1.1  jmcneill /* STiH418 introduces new clock outputs compared to STiH410 */
     14      1.1  jmcneill 
     15      1.1  jmcneill /* CLOCKGEN C0 */
     16      1.1  jmcneill #define CLK_PROC_BDISP_0        14
     17      1.1  jmcneill #define CLK_PROC_BDISP_1        15
     18      1.1  jmcneill #define CLK_TX_ICN_1            23
     19      1.1  jmcneill #define CLK_ETH_PHYREF          27
     20      1.1  jmcneill #define CLK_PP_HEVC             35
     21      1.1  jmcneill #define CLK_CLUST_HEVC          36
     22      1.1  jmcneill #define CLK_HWPE_HEVC           37
     23      1.1  jmcneill #define CLK_FC_HEVC             38
     24      1.1  jmcneill #define CLK_PROC_MIXER		39
     25      1.1  jmcneill #define CLK_PROC_SC		40
     26      1.1  jmcneill #define CLK_AVSP_HEVC		41
     27      1.1  jmcneill 
     28      1.1  jmcneill /* CLOCKGEN D2 */
     29      1.1  jmcneill #undef CLK_PIX_PIP
     30      1.1  jmcneill #undef CLK_PIX_GDP1
     31      1.1  jmcneill #undef CLK_PIX_GDP2
     32      1.1  jmcneill #undef CLK_PIX_GDP3
     33      1.1  jmcneill #undef CLK_PIX_GDP4
     34      1.1  jmcneill 
     35      1.1  jmcneill #define CLK_TMDS_HDMI_DIV2	5
     36      1.1  jmcneill #define CLK_VP9			47
     37      1.1  jmcneill #endif
     38