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      1      1.1  jmcneill /*	$NetBSD: at91.h,v 1.1.1.2 2020/01/03 14:33:03 skrll Exp $	*/
      2      1.1  jmcneill 
      3  1.1.1.2     skrll /* SPDX-License-Identifier: GPL-2.0-only */
      4      1.1  jmcneill /*
      5      1.1  jmcneill  * This header provides macros for at91 dma bindings.
      6      1.1  jmcneill  *
      7      1.1  jmcneill  * Copyright (C) 2013 Ludovic Desroches <ludovic.desroches (at) atmel.com>
      8      1.1  jmcneill  */
      9      1.1  jmcneill 
     10      1.1  jmcneill #ifndef __DT_BINDINGS_AT91_DMA_H__
     11      1.1  jmcneill #define __DT_BINDINGS_AT91_DMA_H__
     12      1.1  jmcneill 
     13      1.1  jmcneill /* ---------- HDMAC ---------- */
     14      1.1  jmcneill 
     15      1.1  jmcneill /*
     16      1.1  jmcneill  * Source and/or destination peripheral ID
     17      1.1  jmcneill  */
     18      1.1  jmcneill #define AT91_DMA_CFG_PER_ID_MASK	(0xff)
     19      1.1  jmcneill #define AT91_DMA_CFG_PER_ID(id)		(id & AT91_DMA_CFG_PER_ID_MASK)
     20      1.1  jmcneill 
     21      1.1  jmcneill /*
     22      1.1  jmcneill  * FIFO configuration: it defines when a request is serviced.
     23      1.1  jmcneill  */
     24      1.1  jmcneill #define AT91_DMA_CFG_FIFOCFG_OFFSET	(8)
     25      1.1  jmcneill #define AT91_DMA_CFG_FIFOCFG_MASK	(0xf << AT91_DMA_CFG_FIFOCFG_OFFSET)
     26      1.1  jmcneill #define AT91_DMA_CFG_FIFOCFG_HALF	(0x0 << AT91_DMA_CFG_FIFOCFG_OFFSET)	/* half FIFO (default behavior) */
     27      1.1  jmcneill #define AT91_DMA_CFG_FIFOCFG_ALAP	(0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET)	/* largest defined AHB burst */
     28      1.1  jmcneill #define AT91_DMA_CFG_FIFOCFG_ASAP	(0x2 << AT91_DMA_CFG_FIFOCFG_OFFSET)	/* single AHB access */
     29      1.1  jmcneill 
     30      1.1  jmcneill 
     31      1.1  jmcneill /* ---------- XDMAC ---------- */
     32      1.1  jmcneill #define AT91_XDMAC_DT_MEM_IF_MASK	(0x1)
     33      1.1  jmcneill #define AT91_XDMAC_DT_MEM_IF_OFFSET	(13)
     34      1.1  jmcneill #define AT91_XDMAC_DT_MEM_IF(mem_if)	(((mem_if) & AT91_XDMAC_DT_MEM_IF_MASK) \
     35      1.1  jmcneill 					<< AT91_XDMAC_DT_MEM_IF_OFFSET)
     36      1.1  jmcneill #define AT91_XDMAC_DT_GET_MEM_IF(cfg)	(((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
     37      1.1  jmcneill 					& AT91_XDMAC_DT_MEM_IF_MASK)
     38      1.1  jmcneill 
     39      1.1  jmcneill #define AT91_XDMAC_DT_PER_IF_MASK	(0x1)
     40      1.1  jmcneill #define AT91_XDMAC_DT_PER_IF_OFFSET	(14)
     41      1.1  jmcneill #define AT91_XDMAC_DT_PER_IF(per_if)	(((per_if) & AT91_XDMAC_DT_PER_IF_MASK) \
     42      1.1  jmcneill 					<< AT91_XDMAC_DT_PER_IF_OFFSET)
     43      1.1  jmcneill #define AT91_XDMAC_DT_GET_PER_IF(cfg)	(((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
     44      1.1  jmcneill 					& AT91_XDMAC_DT_PER_IF_MASK)
     45      1.1  jmcneill 
     46      1.1  jmcneill #define AT91_XDMAC_DT_PERID_MASK	(0x7f)
     47      1.1  jmcneill #define AT91_XDMAC_DT_PERID_OFFSET	(24)
     48      1.1  jmcneill #define AT91_XDMAC_DT_PERID(perid)	(((perid) & AT91_XDMAC_DT_PERID_MASK) \
     49      1.1  jmcneill 					<< AT91_XDMAC_DT_PERID_OFFSET)
     50      1.1  jmcneill #define AT91_XDMAC_DT_GET_PERID(cfg)	(((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
     51      1.1  jmcneill 					& AT91_XDMAC_DT_PERID_MASK)
     52      1.1  jmcneill 
     53      1.1  jmcneill #endif /* __DT_BINDINGS_AT91_DMA_H__ */
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