1 1.1 jmcneill /* $NetBSD: mt8192-gce.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /* SPDX-License-Identifier: GPL-2.0 */ 4 1.1 jmcneill /* 5 1.1 jmcneill * Copyright (c) 2020 MediaTek Inc. 6 1.1 jmcneill * Author: Yongqiang Niu <yongqiang.niu (at) mediatek.com> 7 1.1 jmcneill */ 8 1.1 jmcneill 9 1.1 jmcneill #ifndef _DT_BINDINGS_GCE_MT8192_H 10 1.1 jmcneill #define _DT_BINDINGS_GCE_MT8192_H 11 1.1 jmcneill 12 1.1 jmcneill /* assign timeout 0 also means default */ 13 1.1 jmcneill #define CMDQ_NO_TIMEOUT 0xffffffff 14 1.1 jmcneill #define CMDQ_TIMEOUT_DEFAULT 1000 15 1.1 jmcneill 16 1.1 jmcneill /* GCE thread priority */ 17 1.1 jmcneill #define CMDQ_THR_PRIO_LOWEST 0 18 1.1 jmcneill #define CMDQ_THR_PRIO_1 1 19 1.1 jmcneill #define CMDQ_THR_PRIO_2 2 20 1.1 jmcneill #define CMDQ_THR_PRIO_3 3 21 1.1 jmcneill #define CMDQ_THR_PRIO_4 4 22 1.1 jmcneill #define CMDQ_THR_PRIO_5 5 23 1.1 jmcneill #define CMDQ_THR_PRIO_6 6 24 1.1 jmcneill #define CMDQ_THR_PRIO_HIGHEST 7 25 1.1 jmcneill 26 1.1 jmcneill /* CPR count in 32bit register */ 27 1.1 jmcneill #define GCE_CPR_COUNT 1312 28 1.1 jmcneill 29 1.1 jmcneill /* GCE subsys table */ 30 1.1 jmcneill #define SUBSYS_1300XXXX 0 31 1.1 jmcneill #define SUBSYS_1400XXXX 1 32 1.1 jmcneill #define SUBSYS_1401XXXX 2 33 1.1 jmcneill #define SUBSYS_1402XXXX 3 34 1.1 jmcneill #define SUBSYS_1502XXXX 4 35 1.1 jmcneill #define SUBSYS_1880XXXX 5 36 1.1 jmcneill #define SUBSYS_1881XXXX 6 37 1.1 jmcneill #define SUBSYS_1882XXXX 7 38 1.1 jmcneill #define SUBSYS_1883XXXX 8 39 1.1 jmcneill #define SUBSYS_1884XXXX 9 40 1.1 jmcneill #define SUBSYS_1000XXXX 10 41 1.1 jmcneill #define SUBSYS_1001XXXX 11 42 1.1 jmcneill #define SUBSYS_1002XXXX 12 43 1.1 jmcneill #define SUBSYS_1003XXXX 13 44 1.1 jmcneill #define SUBSYS_1004XXXX 14 45 1.1 jmcneill #define SUBSYS_1005XXXX 15 46 1.1 jmcneill #define SUBSYS_1020XXXX 16 47 1.1 jmcneill #define SUBSYS_1028XXXX 17 48 1.1 jmcneill #define SUBSYS_1700XXXX 18 49 1.1 jmcneill #define SUBSYS_1701XXXX 19 50 1.1 jmcneill #define SUBSYS_1702XXXX 20 51 1.1 jmcneill #define SUBSYS_1703XXXX 21 52 1.1 jmcneill #define SUBSYS_1800XXXX 22 53 1.1 jmcneill #define SUBSYS_1801XXXX 23 54 1.1 jmcneill #define SUBSYS_1802XXXX 24 55 1.1 jmcneill #define SUBSYS_1804XXXX 25 56 1.1 jmcneill #define SUBSYS_1805XXXX 26 57 1.1 jmcneill #define SUBSYS_1808XXXX 27 58 1.1 jmcneill #define SUBSYS_180aXXXX 28 59 1.1 jmcneill #define SUBSYS_180bXXXX 29 60 1.1 jmcneill 61 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_SOF_0 0 62 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_0 1 63 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_1 2 64 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_2 3 65 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_3 4 66 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_4 5 67 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_5 6 68 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_6 7 69 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_0 8 70 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_1 9 71 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_2 10 72 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_3 11 73 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_4 12 74 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_5 13 75 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_6 14 76 1.1 jmcneill #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_7 15 77 1.1 jmcneill 78 1.1 jmcneill #define CMDQ_EVENT_ISP_FRAME_DONE_A 65 79 1.1 jmcneill #define CMDQ_EVENT_ISP_FRAME_DONE_B 66 80 1.1 jmcneill #define CMDQ_EVENT_ISP_FRAME_DONE_C 67 81 1.1 jmcneill #define CMDQ_EVENT_CAMSV0_PASS1_DONE 68 82 1.1 jmcneill #define CMDQ_EVENT_CAMSV02_PASS1_DONE 69 83 1.1 jmcneill #define CMDQ_EVENT_CAMSV1_PASS1_DONE 70 84 1.1 jmcneill #define CMDQ_EVENT_CAMSV2_PASS1_DONE 71 85 1.1 jmcneill #define CMDQ_EVENT_CAMSV3_PASS1_DONE 72 86 1.1 jmcneill #define CMDQ_EVENT_MRAW_0_PASS1_DONE 73 87 1.1 jmcneill #define CMDQ_EVENT_MRAW_1_PASS1_DONE 74 88 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM0_FIFO_FULL 75 89 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM1_FIFO_FULL 76 90 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM2_FIFO_FULL 77 91 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM3_FIFO_FULL 78 92 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM4_FIFO_FULL 79 93 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM5_FIFO_FULL 80 94 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM6_FIFO_FULL 81 95 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM7_FIFO_FULL 82 96 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM8_FIFO_FULL 83 97 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM9_FIFO_FULL 84 98 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM10_FIFO_FULL 85 99 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM11_FIFO_FULL 86 100 1.1 jmcneill #define CMDQ_EVENT_SENINF_CAM12_FIFO_FULL 87 101 1.1 jmcneill #define CMDQ_EVENT_TG_OVRUN_A_INT 88 102 1.1 jmcneill #define CMDQ_EVENT_DMA_R1_ERROR_A_INT 89 103 1.1 jmcneill #define CMDQ_EVENT_TG_OVRUN_B_INT 90 104 1.1 jmcneill #define CMDQ_EVENT_DMA_R1_ERROR_B_INT 91 105 1.1 jmcneill #define CMDQ_EVENT_TG_OVRUN_C_INT 92 106 1.1 jmcneill #define CMDQ_EVENT_DMA_R1_ERROR_C_INT 93 107 1.1 jmcneill #define CMDQ_EVENT_TG_OVRUN_M0_INT 94 108 1.1 jmcneill #define CMDQ_EVENT_DMA_R1_ERROR_M0_INT 95 109 1.1 jmcneill #define CMDQ_EVENT_TG_GRABERR_M0_INT 96 110 1.1 jmcneill #define CMDQ_EVENT_TG_GRABERR_M1_INT 97 111 1.1 jmcneill #define CMDQ_EVENT_TG_GRABERR_A_INT 98 112 1.1 jmcneill #define CMDQ_EVENT_CQ_VR_SNAP_A_INT 99 113 1.1 jmcneill #define CMDQ_EVENT_TG_GRABERR_B_INT 100 114 1.1 jmcneill #define CMDQ_EVENT_CQ_VR_SNAP_B_INT 101 115 1.1 jmcneill #define CMDQ_EVENT_TG_GRABERR_C_INT 102 116 1.1 jmcneill #define CMDQ_EVENT_CQ_VR_SNAP_C_INT 103 117 1.1 jmcneill 118 1.1 jmcneill #define CMDQ_EVENT_VENC_CMDQ_FRAME_DONE 129 119 1.1 jmcneill #define CMDQ_EVENT_VENC_CMDQ_PAUSE_DONE 130 120 1.1 jmcneill #define CMDQ_EVENT_JPGENC_CMDQ_DONE 131 121 1.1 jmcneill #define CMDQ_EVENT_VENC_CMDQ_MB_DONE 132 122 1.1 jmcneill #define CMDQ_EVENT_VENC_CMDQ_128BYTE_CNT_DONE 133 123 1.1 jmcneill #define CMDQ_EVENT_VENC_C0_CMDQ_WP_2ND_STAGE_DONE 134 124 1.1 jmcneill #define CMDQ_EVENT_VENC_C0_CMDQ_WP_3RD_STAGE_DONE 135 125 1.1 jmcneill #define CMDQ_EVENT_VENC_CMDQ_PPS_DONE 136 126 1.1 jmcneill #define CMDQ_EVENT_VENC_CMDQ_SPS_DONE 137 127 1.1 jmcneill #define CMDQ_EVENT_VENC_CMDQ_VPS_DONE 138 128 1.1 jmcneill 129 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_SOF_0 160 130 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_0 161 131 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_1 162 132 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_2 163 133 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_3 164 134 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_4 165 135 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_5 166 136 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_6 167 137 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_0 168 138 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_1 169 139 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_2 170 140 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_3 171 141 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_4 172 142 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_5 173 143 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_6 174 144 1.1 jmcneill #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_7 175 145 1.1 jmcneill #define CMDQ_EVENT_FDVT_DONE 177 146 1.1 jmcneill #define CMDQ_EVENT_FE_DONE 178 147 1.1 jmcneill #define CMDQ_EVENT_RSC_DONE 179 148 1.1 jmcneill #define CMDQ_EVENT_DVS_DONE_ASYNC_SHOT 180 149 1.1 jmcneill #define CMDQ_EVENT_DVP_DONE_ASYNC_SHOT 181 150 1.1 jmcneill 151 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_0 193 152 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_1 194 153 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_2 195 154 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_3 196 155 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_4 197 156 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_5 198 157 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_6 199 158 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_7 200 159 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_8 201 160 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_9 202 161 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_10 203 162 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_11 204 163 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_12 205 164 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_13 206 165 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_14 207 166 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_15 208 167 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_16 209 168 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_17 210 169 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_18 211 170 1.1 jmcneill #define CMDQ_EVENT_IMG2_DIP_DMA_ERR_EVENT 212 171 1.1 jmcneill #define CMDQ_EVENT_IMG2_AMD_FRAME_DONE 213 172 1.1 jmcneill #define CMDQ_EVENT_IMG2_MFB_DONE_LINK_MISC 214 173 1.1 jmcneill #define CMDQ_EVENT_IMG2_WPE_A_DONE_LINK_MISC 215 174 1.1 jmcneill #define CMDQ_EVENT_IMG2_MSS_DONE_LINK_MISC 216 175 1.1 jmcneill 176 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_0 225 177 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_1 226 178 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_2 227 179 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_3 228 180 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_4 229 181 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_5 230 182 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_6 231 183 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_7 232 184 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_8 233 185 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_9 234 186 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_10 235 187 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_11 236 188 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_12 237 189 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_13 238 190 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_14 239 191 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_15 240 192 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_16 241 193 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_17 242 194 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_18 243 195 1.1 jmcneill #define CMDQ_EVENT_IMG1_DIP_DMA_ERR_EVENT 244 196 1.1 jmcneill #define CMDQ_EVENT_IMG1_AMD_FRAME_DONE 245 197 1.1 jmcneill #define CMDQ_EVENT_IMG1_MFB_DONE_LINK_MISC 246 198 1.1 jmcneill #define CMDQ_EVENT_IMG1_WPE_A_DONE_LINK_MISC 247 199 1.1 jmcneill #define CMDQ_EVENT_IMG1_MSS_DONE_LINK_MISC 248 200 1.1 jmcneill 201 1.1 jmcneill #define CMDQ_EVENT_MDP_RDMA0_SOF 256 202 1.1 jmcneill #define CMDQ_EVENT_MDP_RDMA1_SOF 257 203 1.1 jmcneill #define CMDQ_EVENT_MDP_AAL0_SOF 258 204 1.1 jmcneill #define CMDQ_EVENT_MDP_AAL1_SOF 259 205 1.1 jmcneill #define CMDQ_EVENT_MDP_HDR0_SOF 260 206 1.1 jmcneill #define CMDQ_EVENT_MDP_HDR1_SOF 261 207 1.1 jmcneill #define CMDQ_EVENT_MDP_RSZ0_SOF 262 208 1.1 jmcneill #define CMDQ_EVENT_MDP_RSZ1_SOF 263 209 1.1 jmcneill #define CMDQ_EVENT_MDP_WROT0_SOF 264 210 1.1 jmcneill #define CMDQ_EVENT_MDP_WROT1_SOF 265 211 1.1 jmcneill #define CMDQ_EVENT_MDP_TDSHP0_SOF 266 212 1.1 jmcneill #define CMDQ_EVENT_MDP_TDSHP1_SOF 267 213 1.1 jmcneill #define CMDQ_EVENT_IMG_DL_RELAY0_SOF 268 214 1.1 jmcneill #define CMDQ_EVENT_IMG_DL_RELAY1_SOF 269 215 1.1 jmcneill #define CMDQ_EVENT_MDP_COLOR0_SOF 270 216 1.1 jmcneill #define CMDQ_EVENT_MDP_COLOR1_SOF 271 217 1.1 jmcneill #define CMDQ_EVENT_MDP_WROT1_FRAME_DONE 290 218 1.1 jmcneill #define CMDQ_EVENT_MDP_WROT0_FRAME_DONE 291 219 1.1 jmcneill #define CMDQ_EVENT_MDP_TDSHP1_FRAME_DONE 294 220 1.1 jmcneill #define CMDQ_EVENT_MDP_TDSHP0_FRAME_DONE 295 221 1.1 jmcneill #define CMDQ_EVENT_MDP_RSZ1_FRAME_DONE 302 222 1.1 jmcneill #define CMDQ_EVENT_MDP_RSZ0_FRAME_DONE 303 223 1.1 jmcneill #define CMDQ_EVENT_MDP_RDMA1_FRAME_DONE 306 224 1.1 jmcneill #define CMDQ_EVENT_MDP_RDMA0_FRAME_DONE 307 225 1.1 jmcneill #define CMDQ_EVENT_MDP_HDR1_FRAME_DONE 308 226 1.1 jmcneill #define CMDQ_EVENT_MDP_HDR0_FRAME_DONE 309 227 1.1 jmcneill #define CMDQ_EVENT_MDP_COLOR1_FRAME_DONE 312 228 1.1 jmcneill #define CMDQ_EVENT_MDP_COLOR0_FRAME_DONE 313 229 1.1 jmcneill #define CMDQ_EVENT_MDP_AAL1_FRAME_DONE 316 230 1.1 jmcneill #define CMDQ_EVENT_MDP_AAL0_FRAME_DONE 317 231 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_0 320 232 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_1 321 233 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_2 322 234 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_3 323 235 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_4 324 236 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_5 325 237 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_6 326 238 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_7 327 239 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_8 328 240 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_9 329 241 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_10 330 242 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_11 331 243 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_12 332 244 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_13 333 245 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_14 334 246 1.1 jmcneill #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_15 335 247 1.1 jmcneill #define CMDQ_EVENT_MDP_WROT1_SW_RST_DONE_ENG_EVENT 338 248 1.1 jmcneill #define CMDQ_EVENT_MDP_WROT0_SW_RST_DONE_ENG_EVENT 339 249 1.1 jmcneill #define CMDQ_EVENT_MDP_RDMA1_SW_RST_DONE_ENG_EVENT 342 250 1.1 jmcneill #define CMDQ_EVENT_MDP_RDMA0_SW_RST_DONE_ENG_EVENT 343 251 1.1 jmcneill 252 1.1 jmcneill #define CMDQ_EVENT_DISP_OVL0_SOF 384 253 1.1 jmcneill #define CMDQ_EVENT_DISP_OVL0_2L_SOF 385 254 1.1 jmcneill #define CMDQ_EVENT_DISP_RDMA0_SOF 386 255 1.1 jmcneill #define CMDQ_EVENT_DISP_RSZ0_SOF 387 256 1.1 jmcneill #define CMDQ_EVENT_DISP_COLOR0_SOF 388 257 1.1 jmcneill #define CMDQ_EVENT_DISP_CCORR0_SOF 389 258 1.1 jmcneill #define CMDQ_EVENT_DISP_AAL0_SOF 390 259 1.1 jmcneill #define CMDQ_EVENT_DISP_GAMMA0_SOF 391 260 1.1 jmcneill #define CMDQ_EVENT_DISP_POSTMASK0_SOF 392 261 1.1 jmcneill #define CMDQ_EVENT_DISP_DITHER0_SOF 393 262 1.1 jmcneill #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE0_SOF 394 263 1.1 jmcneill #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE1_SOF 395 264 1.1 jmcneill #define CMDQ_EVENT_DSI0_SOF 396 265 1.1 jmcneill #define CMDQ_EVENT_DISP_WDMA0_SOF 397 266 1.1 jmcneill #define CMDQ_EVENT_DISP_UFBC_WDMA0_SOF 398 267 1.1 jmcneill #define CMDQ_EVENT_DISP_PWM0_SOF 399 268 1.1 jmcneill #define CMDQ_EVENT_DISP_OVL2_2L_SOF 400 269 1.1 jmcneill #define CMDQ_EVENT_DISP_RDMA4_SOF 401 270 1.1 jmcneill #define CMDQ_EVENT_DISP_DPI0_SOF 402 271 1.1 jmcneill #define CMDQ_EVENT_MDP_RDMA4_SOF 403 272 1.1 jmcneill #define CMDQ_EVENT_MDP_HDR4_SOF 404 273 1.1 jmcneill #define CMDQ_EVENT_MDP_RSZ4_SOF 405 274 1.1 jmcneill #define CMDQ_EVENT_MDP_AAL4_SOF 406 275 1.1 jmcneill #define CMDQ_EVENT_MDP_TDSHP4_SOF 407 276 1.1 jmcneill #define CMDQ_EVENT_MDP_COLOR4_SOF 408 277 1.1 jmcneill #define CMDQ_EVENT_DISP_Y2R0_SOF 409 278 1.1 jmcneill #define CMDQ_EVENT_MDP_TDSHP4_FRAME_DONE 410 279 1.1 jmcneill #define CMDQ_EVENT_MDP_RSZ4_FRAME_DONE 411 280 1.1 jmcneill #define CMDQ_EVENT_MDP_RDMA4_FRAME_DONE 412 281 1.1 jmcneill #define CMDQ_EVENT_MDP_HDR4_FRAME_DONE 413 282 1.1 jmcneill #define CMDQ_EVENT_MDP_COLOR4_FRAME_DONE 414 283 1.1 jmcneill #define CMDQ_EVENT_MDP_AAL4_FRAME_DONE 415 284 1.1 jmcneill #define CMDQ_EVENT_DSI0_FRAME_DONE 416 285 1.1 jmcneill #define CMDQ_EVENT_DISP_WDMA0_FRAME_DONE 417 286 1.1 jmcneill #define CMDQ_EVENT_DISP_UFBC_WDMA0_FRAME_DONE 418 287 1.1 jmcneill #define CMDQ_EVENT_DISP_RSZ0_FRAME_DONE 419 288 1.1 jmcneill #define CMDQ_EVENT_DISP_RDMA4_FRAME_DONE 420 289 1.1 jmcneill #define CMDQ_EVENT_DISP_RDMA0_FRAME_DONE 421 290 1.1 jmcneill #define CMDQ_EVENT_DISP_POSTMASK0_FRAME_DONE 422 291 1.1 jmcneill #define CMDQ_EVENT_DISP_OVL2_2L_FRAME_DONE 423 292 1.1 jmcneill #define CMDQ_EVENT_DISP_OVL0_FRAME_DONE 424 293 1.1 jmcneill #define CMDQ_EVENT_DISP_OVL0_2L_FRAME_DONE 425 294 1.1 jmcneill #define CMDQ_EVENT_DISP_GAMMA0_FRAME_DONE 426 295 1.1 jmcneill #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE1_FRAME_DONE 427 296 1.1 jmcneill #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE0_FRAME_DONE 428 297 1.1 jmcneill #define CMDQ_EVENT_DISP_DPI0_FRAME_DONE 429 298 1.1 jmcneill #define CMDQ_EVENT_DISP_DITHER0_FRAME_DONE 430 299 1.1 jmcneill #define CMDQ_EVENT_DISP_COLOR0_FRAME_DONE 431 300 1.1 jmcneill #define CMDQ_EVENT_DISP_CCORR0_FRAME_DONE 432 301 1.1 jmcneill #define CMDQ_EVENT_DISP_AAL0_FRAME_DONE 433 302 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_0 434 303 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_1 435 304 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_2 436 305 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_3 437 306 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_4 438 307 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_5 439 308 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_6 440 309 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_7 441 310 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_8 442 311 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_9 443 312 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_10 444 313 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_11 445 314 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_12 446 315 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_13 447 316 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_14 448 317 1.1 jmcneill #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_15 449 318 1.1 jmcneill #define CMDQ_EVENT_DSI0_TE_ENG_EVENT 450 319 1.1 jmcneill #define CMDQ_EVENT_DSI0_IRQ_ENG_EVENT 451 320 1.1 jmcneill #define CMDQ_EVENT_DSI0_DONE_ENG_EVENT 452 321 1.1 jmcneill #define CMDQ_EVENT_DISP_WDMA0_SW_RST_DONE_ENG_EVENT 453 322 1.1 jmcneill #define CMDQ_EVENT_DISP_SMIASSERT_ENG_EVENT 454 323 1.1 jmcneill #define CMDQ_EVENT_DISP_POSTMASK0_RST_DONE_ENG_EVENT 455 324 1.1 jmcneill #define CMDQ_EVENT_DISP_OVL2_2L_RST_DONE_ENG_EVENT 456 325 1.1 jmcneill #define CMDQ_EVENT_DISP_OVL0_RST_DONE_ENG_EVENT 457 326 1.1 jmcneill #define CMDQ_EVENT_DISP_OVL0_2L_RST_DONE_ENG_EVENT 458 327 1.1 jmcneill #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_0 459 328 1.1 jmcneill #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_1 460 329 1.1 jmcneill #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_2 461 330 1.1 jmcneill #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_3 462 331 1.1 jmcneill #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_4 463 332 1.1 jmcneill #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_5 464 333 1.1 jmcneill #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_6 465 334 1.1 jmcneill #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_7 466 335 1.1 jmcneill #define CMDQ_MAX_HW_EVENT 512 336 1.1 jmcneill 337 1.1 jmcneill #endif 338