tegra241-gpio.h revision 1.1.1.1 
1/*	$NetBSD: tegra241-gpio.h,v 1.1.1.1 2026/01/18 05:21:44 skrll Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0 */
4/* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. */
5
6/*
7 * This header provides constants for the nvidia,tegra241-gpio DT binding.
8 *
9 * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
10 * provide names for this.
11 *
12 * The second cell contains standard flag values specified in gpio.h.
13 */
14
15#ifndef _DT_BINDINGS_GPIO_TEGRA241_GPIO_H
16#define _DT_BINDINGS_GPIO_TEGRA241_GPIO_H
17
18#include <dt-bindings/gpio/gpio.h>
19
20/* GPIOs implemented by main GPIO controller */
21#define TEGRA241_MAIN_GPIO_PORT_A 0
22#define TEGRA241_MAIN_GPIO_PORT_B 1
23#define TEGRA241_MAIN_GPIO_PORT_C 2
24#define TEGRA241_MAIN_GPIO_PORT_D 3
25#define TEGRA241_MAIN_GPIO_PORT_E 4
26#define TEGRA241_MAIN_GPIO_PORT_F 5
27#define TEGRA241_MAIN_GPIO_PORT_G 6
28#define TEGRA241_MAIN_GPIO_PORT_H 7
29#define TEGRA241_MAIN_GPIO_PORT_I 8
30#define TEGRA241_MAIN_GPIO_PORT_J 9
31#define TEGRA241_MAIN_GPIO_PORT_K 10
32#define TEGRA241_MAIN_GPIO_PORT_L 11
33
34#define TEGRA241_MAIN_GPIO(port, offset) \
35	((TEGRA241_MAIN_GPIO_PORT_##port * 8) + (offset))
36
37/* GPIOs implemented by AON GPIO controller */
38#define TEGRA241_AON_GPIO_PORT_AA 0
39#define TEGRA241_AON_GPIO_PORT_BB 1
40
41#define TEGRA241_AON_GPIO(port, offset) \
42	((TEGRA241_AON_GPIO_PORT_##port * 8) + (offset))
43
44#endif
45