qcom,sa8775p-rpmh.h revision 1.1.1.1
1/* $NetBSD: qcom,sa8775p-rpmh.h,v 1.1.1.1 2026/01/18 05:21:45 skrll Exp $ */ 2 3/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 4/* 5 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 6 * Copyright (c) 2023, Linaro Limited 7 */ 8 9#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SA8775P_H 10#define __DT_BINDINGS_INTERCONNECT_QCOM_SA8775P_H 11 12/* aggre1_noc */ 13#define MASTER_QUP_3 0 14#define MASTER_EMAC 1 15#define MASTER_EMAC_1 2 16#define MASTER_SDC 3 17#define MASTER_UFS_MEM 4 18#define MASTER_USB2 5 19#define MASTER_USB3_0 6 20#define MASTER_USB3_1 7 21#define SLAVE_A1NOC_SNOC 8 22 23/* aggre2_noc */ 24#define MASTER_QDSS_BAM 0 25#define MASTER_QUP_0 1 26#define MASTER_QUP_1 2 27#define MASTER_QUP_2 3 28#define MASTER_CNOC_A2NOC 4 29#define MASTER_CRYPTO_CORE0 5 30#define MASTER_CRYPTO_CORE1 6 31#define MASTER_IPA 7 32#define MASTER_QDSS_ETR_0 8 33#define MASTER_QDSS_ETR_1 9 34#define MASTER_UFS_CARD 10 35#define SLAVE_A2NOC_SNOC 11 36 37/* clk_virt */ 38#define MASTER_QUP_CORE_0 0 39#define MASTER_QUP_CORE_1 1 40#define MASTER_QUP_CORE_2 2 41#define MASTER_QUP_CORE_3 3 42#define SLAVE_QUP_CORE_0 4 43#define SLAVE_QUP_CORE_1 5 44#define SLAVE_QUP_CORE_2 6 45#define SLAVE_QUP_CORE_3 7 46 47/* config_noc */ 48#define MASTER_GEM_NOC_CNOC 0 49#define MASTER_GEM_NOC_PCIE_SNOC 1 50#define SLAVE_AHB2PHY_0 2 51#define SLAVE_AHB2PHY_1 3 52#define SLAVE_AHB2PHY_2 4 53#define SLAVE_AHB2PHY_3 5 54#define SLAVE_ANOC_THROTTLE_CFG 6 55#define SLAVE_AOSS 7 56#define SLAVE_APPSS 8 57#define SLAVE_BOOT_ROM 9 58#define SLAVE_CAMERA_CFG 10 59#define SLAVE_CAMERA_NRT_THROTTLE_CFG 11 60#define SLAVE_CAMERA_RT_THROTTLE_CFG 12 61#define SLAVE_CLK_CTL 13 62#define SLAVE_CDSP_CFG 14 63#define SLAVE_CDSP1_CFG 15 64#define SLAVE_RBCPR_CX_CFG 16 65#define SLAVE_RBCPR_MMCX_CFG 17 66#define SLAVE_RBCPR_MX_CFG 18 67#define SLAVE_CPR_NSPCX 19 68#define SLAVE_CRYPTO_0_CFG 20 69#define SLAVE_CX_RDPM 21 70#define SLAVE_DISPLAY_CFG 22 71#define SLAVE_DISPLAY_RT_THROTTLE_CFG 23 72#define SLAVE_DISPLAY1_CFG 24 73#define SLAVE_DISPLAY1_RT_THROTTLE_CFG 25 74#define SLAVE_EMAC_CFG 26 75#define SLAVE_EMAC1_CFG 27 76#define SLAVE_GP_DSP0_CFG 28 77#define SLAVE_GP_DSP1_CFG 29 78#define SLAVE_GPDSP0_THROTTLE_CFG 30 79#define SLAVE_GPDSP1_THROTTLE_CFG 31 80#define SLAVE_GPU_TCU_THROTTLE_CFG 32 81#define SLAVE_GFX3D_CFG 33 82#define SLAVE_HWKM 34 83#define SLAVE_IMEM_CFG 35 84#define SLAVE_IPA_CFG 36 85#define SLAVE_IPC_ROUTER_CFG 37 86#define SLAVE_LPASS 38 87#define SLAVE_LPASS_THROTTLE_CFG 39 88#define SLAVE_MX_RDPM 40 89#define SLAVE_MXC_RDPM 41 90#define SLAVE_PCIE_0_CFG 42 91#define SLAVE_PCIE_1_CFG 43 92#define SLAVE_PCIE_RSC_CFG 44 93#define SLAVE_PCIE_TCU_THROTTLE_CFG 45 94#define SLAVE_PCIE_THROTTLE_CFG 46 95#define SLAVE_PDM 47 96#define SLAVE_PIMEM_CFG 48 97#define SLAVE_PKA_WRAPPER_CFG 49 98#define SLAVE_QDSS_CFG 50 99#define SLAVE_QM_CFG 51 100#define SLAVE_QM_MPU_CFG 52 101#define SLAVE_QUP_0 53 102#define SLAVE_QUP_1 54 103#define SLAVE_QUP_2 55 104#define SLAVE_QUP_3 56 105#define SLAVE_SAIL_THROTTLE_CFG 57 106#define SLAVE_SDC1 58 107#define SLAVE_SECURITY 59 108#define SLAVE_SNOC_THROTTLE_CFG 60 109#define SLAVE_TCSR 61 110#define SLAVE_TLMM 62 111#define SLAVE_TSC_CFG 63 112#define SLAVE_UFS_CARD_CFG 64 113#define SLAVE_UFS_MEM_CFG 65 114#define SLAVE_USB2 66 115#define SLAVE_USB3_0 67 116#define SLAVE_USB3_1 68 117#define SLAVE_VENUS_CFG 69 118#define SLAVE_VENUS_CVP_THROTTLE_CFG 70 119#define SLAVE_VENUS_V_CPU_THROTTLE_CFG 71 120#define SLAVE_VENUS_VCODEC_THROTTLE_CFG 72 121#define SLAVE_DDRSS_CFG 73 122#define SLAVE_GPDSP_NOC_CFG 74 123#define SLAVE_CNOC_MNOC_HF_CFG 75 124#define SLAVE_CNOC_MNOC_SF_CFG 76 125#define SLAVE_PCIE_ANOC_CFG 77 126#define SLAVE_SNOC_CFG 78 127#define SLAVE_BOOT_IMEM 79 128#define SLAVE_IMEM 80 129#define SLAVE_PIMEM 81 130#define SLAVE_PCIE_0 82 131#define SLAVE_PCIE_1 83 132#define SLAVE_QDSS_STM 84 133#define SLAVE_TCU 85 134 135/* dc_noc */ 136#define MASTER_CNOC_DC_NOC 0 137#define SLAVE_LLCC_CFG 1 138#define SLAVE_GEM_NOC_CFG 2 139 140/* gem_noc */ 141#define MASTER_GPU_TCU 0 142#define MASTER_PCIE_TCU 1 143#define MASTER_SYS_TCU 2 144#define MASTER_APPSS_PROC 3 145#define MASTER_COMPUTE_NOC 4 146#define MASTER_COMPUTE_NOC_1 5 147#define MASTER_GEM_NOC_CFG 6 148#define MASTER_GPDSP_SAIL 7 149#define MASTER_GFX3D 8 150#define MASTER_MNOC_HF_MEM_NOC 9 151#define MASTER_MNOC_SF_MEM_NOC 10 152#define MASTER_ANOC_PCIE_GEM_NOC 11 153#define MASTER_SNOC_GC_MEM_NOC 12 154#define MASTER_SNOC_SF_MEM_NOC 13 155#define SLAVE_GEM_NOC_CNOC 14 156#define SLAVE_LLCC 15 157#define SLAVE_GEM_NOC_PCIE_CNOC 16 158#define SLAVE_SERVICE_GEM_NOC_1 17 159#define SLAVE_SERVICE_GEM_NOC_2 18 160#define SLAVE_SERVICE_GEM_NOC 19 161#define SLAVE_SERVICE_GEM_NOC2 20 162 163/* gpdsp_anoc */ 164#define MASTER_DSP0 0 165#define MASTER_DSP1 1 166#define SLAVE_GP_DSP_SAIL_NOC 2 167 168/* lpass_ag_noc */ 169#define MASTER_CNOC_LPASS_AG_NOC 0 170#define MASTER_LPASS_PROC 1 171#define SLAVE_LPASS_CORE_CFG 2 172#define SLAVE_LPASS_LPI_CFG 3 173#define SLAVE_LPASS_MPU_CFG 4 174#define SLAVE_LPASS_TOP_CFG 5 175#define SLAVE_LPASS_SNOC 6 176#define SLAVE_SERVICES_LPASS_AML_NOC 7 177#define SLAVE_SERVICE_LPASS_AG_NOC 8 178 179/* mc_virt */ 180#define MASTER_LLCC 0 181#define SLAVE_EBI1 1 182 183/*mmss_noc */ 184#define MASTER_CAMNOC_HF 0 185#define MASTER_CAMNOC_ICP 1 186#define MASTER_CAMNOC_SF 2 187#define MASTER_MDP0 3 188#define MASTER_MDP1 4 189#define MASTER_MDP_CORE1_0 5 190#define MASTER_MDP_CORE1_1 6 191#define MASTER_CNOC_MNOC_HF_CFG 7 192#define MASTER_CNOC_MNOC_SF_CFG 8 193#define MASTER_VIDEO_P0 9 194#define MASTER_VIDEO_P1 10 195#define MASTER_VIDEO_PROC 11 196#define MASTER_VIDEO_V_PROC 12 197#define SLAVE_MNOC_HF_MEM_NOC 13 198#define SLAVE_MNOC_SF_MEM_NOC 14 199#define SLAVE_SERVICE_MNOC_HF 15 200#define SLAVE_SERVICE_MNOC_SF 16 201 202/* nspa_noc */ 203#define MASTER_CDSP_NOC_CFG 0 204#define MASTER_CDSP_PROC 1 205#define SLAVE_HCP_A 2 206#define SLAVE_CDSP_MEM_NOC 3 207#define SLAVE_SERVICE_NSP_NOC 4 208 209/* nspb_noc */ 210#define MASTER_CDSPB_NOC_CFG 0 211#define MASTER_CDSP_PROC_B 1 212#define SLAVE_CDSPB_MEM_NOC 2 213#define SLAVE_HCP_B 3 214#define SLAVE_SERVICE_NSPB_NOC 4 215 216/* pcie_anoc */ 217#define MASTER_PCIE_0 0 218#define MASTER_PCIE_1 1 219#define SLAVE_ANOC_PCIE_GEM_NOC 2 220 221/* system_noc */ 222#define MASTER_GIC_AHB 0 223#define MASTER_A1NOC_SNOC 1 224#define MASTER_A2NOC_SNOC 2 225#define MASTER_LPASS_ANOC 3 226#define MASTER_SNOC_CFG 4 227#define MASTER_PIMEM 5 228#define MASTER_GIC 6 229#define SLAVE_SNOC_GEM_NOC_GC 7 230#define SLAVE_SNOC_GEM_NOC_SF 8 231#define SLAVE_SERVICE_SNOC 9 232 233#endif /* __DT_BINDINGS_INTERCONNECT_QCOM_SA8775P_H */ 234