11.1Sjmcneill/* $NetBSD: qcom,sdx55.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 21.1Sjmcneill 31.1Sjmcneill/* SPDX-License-Identifier: GPL-2.0 */ 41.1Sjmcneill/* 51.1Sjmcneill * Qualcomm SDX55 interconnect IDs 61.1Sjmcneill * 71.1Sjmcneill * Copyright (c) 2021, Linaro Ltd. 81.1Sjmcneill * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 91.1Sjmcneill */ 101.1Sjmcneill 111.1Sjmcneill#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX55_H 121.1Sjmcneill#define __DT_BINDINGS_INTERCONNECT_QCOM_SDX55_H 131.1Sjmcneill 141.1Sjmcneill#define MASTER_LLCC 0 151.1Sjmcneill#define SLAVE_EBI_CH0 1 161.1Sjmcneill 171.1Sjmcneill#define MASTER_TCU_0 0 181.1Sjmcneill#define MASTER_SNOC_GC_MEM_NOC 1 191.1Sjmcneill#define MASTER_AMPSS_M0 2 201.1Sjmcneill#define SLAVE_LLCC 3 211.1Sjmcneill#define SLAVE_MEM_NOC_SNOC 4 221.1Sjmcneill#define SLAVE_MEM_NOC_PCIE_SNOC 5 231.1Sjmcneill 241.1Sjmcneill#define MASTER_AUDIO 0 251.1Sjmcneill#define MASTER_BLSP_1 1 261.1Sjmcneill#define MASTER_QDSS_BAM 2 271.1Sjmcneill#define MASTER_QPIC 3 281.1Sjmcneill#define MASTER_SNOC_CFG 4 291.1Sjmcneill#define MASTER_SPMI_FETCHER 5 301.1Sjmcneill#define MASTER_ANOC_SNOC 6 311.1Sjmcneill#define MASTER_IPA 7 321.1Sjmcneill#define MASTER_MEM_NOC_SNOC 8 331.1Sjmcneill#define MASTER_MEM_NOC_PCIE_SNOC 9 341.1Sjmcneill#define MASTER_CRYPTO_CORE_0 10 351.1Sjmcneill#define MASTER_EMAC 11 361.1Sjmcneill#define MASTER_IPA_PCIE 12 371.1Sjmcneill#define MASTER_PCIE 13 381.1Sjmcneill#define MASTER_QDSS_ETR 14 391.1Sjmcneill#define MASTER_SDCC_1 15 401.1Sjmcneill#define MASTER_USB3 16 411.1Sjmcneill#define SLAVE_AOP 17 421.1Sjmcneill#define SLAVE_AOSS 18 431.1Sjmcneill#define SLAVE_APPSS 19 441.1Sjmcneill#define SLAVE_AUDIO 20 451.1Sjmcneill#define SLAVE_BLSP_1 21 461.1Sjmcneill#define SLAVE_CLK_CTL 22 471.1Sjmcneill#define SLAVE_CRYPTO_0_CFG 23 481.1Sjmcneill#define SLAVE_CNOC_DDRSS 24 491.1Sjmcneill#define SLAVE_ECC_CFG 25 501.1Sjmcneill#define SLAVE_EMAC_CFG 26 511.1Sjmcneill#define SLAVE_IMEM_CFG 27 521.1Sjmcneill#define SLAVE_IPA_CFG 28 531.1Sjmcneill#define SLAVE_CNOC_MSS 29 541.1Sjmcneill#define SLAVE_PCIE_PARF 30 551.1Sjmcneill#define SLAVE_PDM 31 561.1Sjmcneill#define SLAVE_PRNG 32 571.1Sjmcneill#define SLAVE_QDSS_CFG 33 581.1Sjmcneill#define SLAVE_QPIC 34 591.1Sjmcneill#define SLAVE_SDCC_1 35 601.1Sjmcneill#define SLAVE_SNOC_CFG 36 611.1Sjmcneill#define SLAVE_SPMI_FETCHER 37 621.1Sjmcneill#define SLAVE_SPMI_VGI_COEX 38 631.1Sjmcneill#define SLAVE_TCSR 39 641.1Sjmcneill#define SLAVE_TLMM 40 651.1Sjmcneill#define SLAVE_USB3 41 661.1Sjmcneill#define SLAVE_USB3_PHY_CFG 42 671.1Sjmcneill#define SLAVE_ANOC_SNOC 43 681.1Sjmcneill#define SLAVE_SNOC_MEM_NOC_GC 44 691.1Sjmcneill#define SLAVE_OCIMEM 45 701.1Sjmcneill#define SLAVE_SERVICE_SNOC 46 711.1Sjmcneill#define SLAVE_PCIE_0 47 721.1Sjmcneill#define SLAVE_QDSS_STM 48 731.1Sjmcneill#define SLAVE_TCU 49 741.1Sjmcneill 751.1Sjmcneill#define MASTER_IPA_CORE 0 761.1Sjmcneill#define SLAVE_IPA_CORE 1 771.1Sjmcneill 781.1Sjmcneill#endif 79