11.1Sjmcneill/* $NetBSD: qcom,sm8250.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 21.1Sjmcneill 31.1Sjmcneill/* SPDX-License-Identifier: GPL-2.0 */ 41.1Sjmcneill/* 51.1Sjmcneill * Qualcomm SM8250 interconnect IDs 61.1Sjmcneill * 71.1Sjmcneill * Copyright (c) 2020, The Linux Foundation. All rights reserved. 81.1Sjmcneill */ 91.1Sjmcneill 101.1Sjmcneill#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H 111.1Sjmcneill#define __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H 121.1Sjmcneill 131.1Sjmcneill#define MASTER_A1NOC_CFG 0 141.1Sjmcneill#define MASTER_QSPI_0 1 151.1Sjmcneill#define MASTER_QUP_1 2 161.1Sjmcneill#define MASTER_QUP_2 3 171.1Sjmcneill#define MASTER_TSIF 4 181.1Sjmcneill#define MASTER_PCIE_2 5 191.1Sjmcneill#define MASTER_SDCC_4 6 201.1Sjmcneill#define MASTER_UFS_MEM 7 211.1Sjmcneill#define MASTER_USB3 8 221.1Sjmcneill#define MASTER_USB3_1 9 231.1Sjmcneill#define A1NOC_SNOC_SLV 10 241.1Sjmcneill#define SLAVE_ANOC_PCIE_GEM_NOC_1 11 251.1Sjmcneill#define SLAVE_SERVICE_A1NOC 12 261.1Sjmcneill 271.1Sjmcneill#define MASTER_A2NOC_CFG 0 281.1Sjmcneill#define MASTER_QDSS_BAM 1 291.1Sjmcneill#define MASTER_QUP_0 2 301.1Sjmcneill#define MASTER_CNOC_A2NOC 3 311.1Sjmcneill#define MASTER_CRYPTO_CORE_0 4 321.1Sjmcneill#define MASTER_IPA 5 331.1Sjmcneill#define MASTER_PCIE 6 341.1Sjmcneill#define MASTER_PCIE_1 7 351.1Sjmcneill#define MASTER_QDSS_ETR 8 361.1Sjmcneill#define MASTER_SDCC_2 9 371.1Sjmcneill#define MASTER_UFS_CARD 10 381.1Sjmcneill#define A2NOC_SNOC_SLV 11 391.1Sjmcneill#define SLAVE_ANOC_PCIE_GEM_NOC 12 401.1Sjmcneill#define SLAVE_SERVICE_A2NOC 13 411.1Sjmcneill 421.1Sjmcneill#define MASTER_NPU 0 431.1Sjmcneill#define SLAVE_CDSP_MEM_NOC 1 441.1Sjmcneill 451.1Sjmcneill#define SNOC_CNOC_MAS 0 461.1Sjmcneill#define MASTER_QDSS_DAP 1 471.1Sjmcneill#define SLAVE_A1NOC_CFG 2 481.1Sjmcneill#define SLAVE_A2NOC_CFG 3 491.1Sjmcneill#define SLAVE_AHB2PHY_SOUTH 4 501.1Sjmcneill#define SLAVE_AHB2PHY_NORTH 5 511.1Sjmcneill#define SLAVE_AOSS 6 521.1Sjmcneill#define SLAVE_CAMERA_CFG 7 531.1Sjmcneill#define SLAVE_CLK_CTL 8 541.1Sjmcneill#define SLAVE_CDSP_CFG 9 551.1Sjmcneill#define SLAVE_RBCPR_CX_CFG 10 561.1Sjmcneill#define SLAVE_RBCPR_MMCX_CFG 11 571.1Sjmcneill#define SLAVE_RBCPR_MX_CFG 12 581.1Sjmcneill#define SLAVE_CRYPTO_0_CFG 13 591.1Sjmcneill#define SLAVE_CX_RDPM 14 601.1Sjmcneill#define SLAVE_DCC_CFG 15 611.1Sjmcneill#define SLAVE_CNOC_DDRSS 16 621.1Sjmcneill#define SLAVE_DISPLAY_CFG 17 631.1Sjmcneill#define SLAVE_GRAPHICS_3D_CFG 18 641.1Sjmcneill#define SLAVE_IMEM_CFG 19 651.1Sjmcneill#define SLAVE_IPA_CFG 20 661.1Sjmcneill#define SLAVE_IPC_ROUTER_CFG 21 671.1Sjmcneill#define SLAVE_LPASS 22 681.1Sjmcneill#define SLAVE_CNOC_MNOC_CFG 23 691.1Sjmcneill#define SLAVE_NPU_CFG 24 701.1Sjmcneill#define SLAVE_PCIE_0_CFG 25 711.1Sjmcneill#define SLAVE_PCIE_1_CFG 26 721.1Sjmcneill#define SLAVE_PCIE_2_CFG 27 731.1Sjmcneill#define SLAVE_PDM 28 741.1Sjmcneill#define SLAVE_PIMEM_CFG 29 751.1Sjmcneill#define SLAVE_PRNG 30 761.1Sjmcneill#define SLAVE_QDSS_CFG 31 771.1Sjmcneill#define SLAVE_QSPI_0 32 781.1Sjmcneill#define SLAVE_QUP_0 33 791.1Sjmcneill#define SLAVE_QUP_1 34 801.1Sjmcneill#define SLAVE_QUP_2 35 811.1Sjmcneill#define SLAVE_SDCC_2 36 821.1Sjmcneill#define SLAVE_SDCC_4 37 831.1Sjmcneill#define SLAVE_SNOC_CFG 38 841.1Sjmcneill#define SLAVE_TCSR 39 851.1Sjmcneill#define SLAVE_TLMM_NORTH 40 861.1Sjmcneill#define SLAVE_TLMM_SOUTH 41 871.1Sjmcneill#define SLAVE_TLMM_WEST 42 881.1Sjmcneill#define SLAVE_TSIF 43 891.1Sjmcneill#define SLAVE_UFS_CARD_CFG 44 901.1Sjmcneill#define SLAVE_UFS_MEM_CFG 45 911.1Sjmcneill#define SLAVE_USB3 46 921.1Sjmcneill#define SLAVE_USB3_1 47 931.1Sjmcneill#define SLAVE_VENUS_CFG 48 941.1Sjmcneill#define SLAVE_VSENSE_CTRL_CFG 49 951.1Sjmcneill#define SLAVE_CNOC_A2NOC 50 961.1Sjmcneill#define SLAVE_SERVICE_CNOC 51 971.1Sjmcneill 981.1Sjmcneill#define MASTER_CNOC_DC_NOC 0 991.1Sjmcneill#define SLAVE_LLCC_CFG 1 1001.1Sjmcneill#define SLAVE_GEM_NOC_CFG 2 1011.1Sjmcneill 1021.1Sjmcneill#define MASTER_GPU_TCU 0 1031.1Sjmcneill#define MASTER_SYS_TCU 1 1041.1Sjmcneill#define MASTER_AMPSS_M0 2 1051.1Sjmcneill#define MASTER_GEM_NOC_CFG 3 1061.1Sjmcneill#define MASTER_COMPUTE_NOC 4 1071.1Sjmcneill#define MASTER_GRAPHICS_3D 5 1081.1Sjmcneill#define MASTER_MNOC_HF_MEM_NOC 6 1091.1Sjmcneill#define MASTER_MNOC_SF_MEM_NOC 7 1101.1Sjmcneill#define MASTER_ANOC_PCIE_GEM_NOC 8 1111.1Sjmcneill#define MASTER_SNOC_GC_MEM_NOC 9 1121.1Sjmcneill#define MASTER_SNOC_SF_MEM_NOC 10 1131.1Sjmcneill#define SLAVE_GEM_NOC_SNOC 11 1141.1Sjmcneill#define SLAVE_LLCC 12 1151.1Sjmcneill#define SLAVE_MEM_NOC_PCIE_SNOC 13 1161.1Sjmcneill#define SLAVE_SERVICE_GEM_NOC_1 14 1171.1Sjmcneill#define SLAVE_SERVICE_GEM_NOC_2 15 1181.1Sjmcneill#define SLAVE_SERVICE_GEM_NOC 16 1191.1Sjmcneill 1201.1Sjmcneill#define MASTER_IPA_CORE 0 1211.1Sjmcneill#define SLAVE_IPA_CORE 1 1221.1Sjmcneill 1231.1Sjmcneill#define MASTER_LLCC 0 1241.1Sjmcneill#define SLAVE_EBI_CH0 1 1251.1Sjmcneill 1261.1Sjmcneill#define MASTER_CNOC_MNOC_CFG 0 1271.1Sjmcneill#define MASTER_CAMNOC_HF 1 1281.1Sjmcneill#define MASTER_CAMNOC_ICP 2 1291.1Sjmcneill#define MASTER_CAMNOC_SF 3 1301.1Sjmcneill#define MASTER_VIDEO_P0 4 1311.1Sjmcneill#define MASTER_VIDEO_P1 5 1321.1Sjmcneill#define MASTER_VIDEO_PROC 6 1331.1Sjmcneill#define MASTER_MDP_PORT0 7 1341.1Sjmcneill#define MASTER_MDP_PORT1 8 1351.1Sjmcneill#define MASTER_ROTATOR 9 1361.1Sjmcneill#define SLAVE_MNOC_HF_MEM_NOC 10 1371.1Sjmcneill#define SLAVE_MNOC_SF_MEM_NOC 11 1381.1Sjmcneill#define SLAVE_SERVICE_MNOC 12 1391.1Sjmcneill 1401.1Sjmcneill#define MASTER_NPU_SYS 0 1411.1Sjmcneill#define MASTER_NPU_CDP 1 1421.1Sjmcneill#define MASTER_NPU_NOC_CFG 2 1431.1Sjmcneill#define SLAVE_NPU_CAL_DP0 3 1441.1Sjmcneill#define SLAVE_NPU_CAL_DP1 4 1451.1Sjmcneill#define SLAVE_NPU_CP 5 1461.1Sjmcneill#define SLAVE_NPU_INT_DMA_BWMON_CFG 6 1471.1Sjmcneill#define SLAVE_NPU_DPM 7 1481.1Sjmcneill#define SLAVE_ISENSE_CFG 8 1491.1Sjmcneill#define SLAVE_NPU_LLM_CFG 9 1501.1Sjmcneill#define SLAVE_NPU_TCM 10 1511.1Sjmcneill#define SLAVE_NPU_COMPUTE_NOC 11 1521.1Sjmcneill#define SLAVE_SERVICE_NPU_NOC 12 1531.1Sjmcneill 1541.1Sjmcneill#define MASTER_SNOC_CFG 0 1551.1Sjmcneill#define A1NOC_SNOC_MAS 1 1561.1Sjmcneill#define A2NOC_SNOC_MAS 2 1571.1Sjmcneill#define MASTER_GEM_NOC_SNOC 3 1581.1Sjmcneill#define MASTER_GEM_NOC_PCIE_SNOC 4 1591.1Sjmcneill#define MASTER_PIMEM 5 1601.1Sjmcneill#define MASTER_GIC 6 1611.1Sjmcneill#define SLAVE_APPSS 7 1621.1Sjmcneill#define SNOC_CNOC_SLV 8 1631.1Sjmcneill#define SLAVE_SNOC_GEM_NOC_GC 9 1641.1Sjmcneill#define SLAVE_SNOC_GEM_NOC_SF 10 1651.1Sjmcneill#define SLAVE_OCIMEM 11 1661.1Sjmcneill#define SLAVE_PIMEM 12 1671.1Sjmcneill#define SLAVE_SERVICE_SNOC 13 1681.1Sjmcneill#define SLAVE_PCIE_0 14 1691.1Sjmcneill#define SLAVE_PCIE_1 15 1701.1Sjmcneill#define SLAVE_PCIE_2 16 1711.1Sjmcneill#define SLAVE_QDSS_STM 17 1721.1Sjmcneill#define SLAVE_TCU 18 1731.1Sjmcneill 1741.1Sjmcneill#endif 175