qcom,sm8350.h revision 1.1.1.1
1/* $NetBSD: qcom,sm8350.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 4/* 5 * Qualcomm SM8350 interconnect IDs 6 * 7 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 8 * Copyright (c) 2021, Linaro Limited 9 */ 10 11#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8350_H 12#define __DT_BINDINGS_INTERCONNECT_QCOM_SM8350_H 13 14#define MASTER_QSPI_0 0 15#define MASTER_QUP_1 1 16#define MASTER_A1NOC_CFG 2 17#define MASTER_SDCC_4 3 18#define MASTER_UFS_MEM 4 19#define MASTER_USB3_0 5 20#define MASTER_USB3_1 6 21#define SLAVE_A1NOC_SNOC 7 22#define SLAVE_SERVICE_A1NOC 8 23 24#define MASTER_QDSS_BAM 0 25#define MASTER_QUP_0 1 26#define MASTER_QUP_2 2 27#define MASTER_A2NOC_CFG 3 28#define MASTER_CRYPTO 4 29#define MASTER_IPA 5 30#define MASTER_PCIE_0 6 31#define MASTER_PCIE_1 7 32#define MASTER_QDSS_ETR 8 33#define MASTER_SDCC_2 9 34#define MASTER_UFS_CARD 10 35#define SLAVE_A2NOC_SNOC 11 36#define SLAVE_ANOC_PCIE_GEM_NOC 12 37#define SLAVE_SERVICE_A2NOC 13 38 39#define MASTER_GEM_NOC_CNOC 0 40#define MASTER_GEM_NOC_PCIE_SNOC 1 41#define MASTER_QDSS_DAP 2 42#define SLAVE_AHB2PHY_SOUTH 3 43#define SLAVE_AHB2PHY_NORTH 4 44#define SLAVE_AOSS 5 45#define SLAVE_APPSS 6 46#define SLAVE_CAMERA_CFG 7 47#define SLAVE_CLK_CTL 8 48#define SLAVE_CDSP_CFG 9 49#define SLAVE_RBCPR_CX_CFG 10 50#define SLAVE_RBCPR_MMCX_CFG 11 51#define SLAVE_RBCPR_MX_CFG 12 52#define SLAVE_CRYPTO_0_CFG 13 53#define SLAVE_CX_RDPM 14 54#define SLAVE_DCC_CFG 15 55#define SLAVE_DISPLAY_CFG 16 56#define SLAVE_GFX3D_CFG 17 57#define SLAVE_HWKM 18 58#define SLAVE_IMEM_CFG 19 59#define SLAVE_IPA_CFG 20 60#define SLAVE_IPC_ROUTER_CFG 21 61#define SLAVE_LPASS 22 62#define SLAVE_CNOC_MSS 23 63#define SLAVE_MX_RDPM 24 64#define SLAVE_PCIE_0_CFG 25 65#define SLAVE_PCIE_1_CFG 26 66#define SLAVE_PDM 27 67#define SLAVE_PIMEM_CFG 28 68#define SLAVE_PKA_WRAPPER_CFG 29 69#define SLAVE_PMU_WRAPPER_CFG 30 70#define SLAVE_QDSS_CFG 31 71#define SLAVE_QSPI_0 32 72#define SLAVE_QUP_0 33 73#define SLAVE_QUP_1 34 74#define SLAVE_QUP_2 35 75#define SLAVE_SDCC_2 36 76#define SLAVE_SDCC_4 37 77#define SLAVE_SECURITY 38 78#define SLAVE_SPSS_CFG 39 79#define SLAVE_TCSR 40 80#define SLAVE_TLMM 41 81#define SLAVE_UFS_CARD_CFG 42 82#define SLAVE_UFS_MEM_CFG 43 83#define SLAVE_USB3_0 44 84#define SLAVE_USB3_1 45 85#define SLAVE_VENUS_CFG 46 86#define SLAVE_VSENSE_CTRL_CFG 47 87#define SLAVE_A1NOC_CFG 48 88#define SLAVE_A2NOC_CFG 49 89#define SLAVE_DDRSS_CFG 50 90#define SLAVE_CNOC_MNOC_CFG 51 91#define SLAVE_SNOC_CFG 52 92#define SLAVE_BOOT_IMEM 53 93#define SLAVE_IMEM 54 94#define SLAVE_PIMEM 55 95#define SLAVE_SERVICE_CNOC 56 96#define SLAVE_PCIE_0 57 97#define SLAVE_PCIE_1 58 98#define SLAVE_QDSS_STM 59 99#define SLAVE_TCU 60 100 101#define MASTER_CNOC_DC_NOC 0 102#define SLAVE_LLCC_CFG 1 103#define SLAVE_GEM_NOC_CFG 2 104 105#define MASTER_GPU_TCU 0 106#define MASTER_SYS_TCU 1 107#define MASTER_APPSS_PROC 2 108#define MASTER_COMPUTE_NOC 3 109#define MASTER_GEM_NOC_CFG 4 110#define MASTER_GFX3D 5 111#define MASTER_MNOC_HF_MEM_NOC 6 112#define MASTER_MNOC_SF_MEM_NOC 7 113#define MASTER_ANOC_PCIE_GEM_NOC 8 114#define MASTER_SNOC_GC_MEM_NOC 9 115#define MASTER_SNOC_SF_MEM_NOC 10 116#define SLAVE_MSS_PROC_MS_MPU_CFG 11 117#define SLAVE_MCDMA_MS_MPU_CFG 12 118#define SLAVE_GEM_NOC_CNOC 13 119#define SLAVE_LLCC 14 120#define SLAVE_MEM_NOC_PCIE_SNOC 15 121#define SLAVE_SERVICE_GEM_NOC_1 16 122#define SLAVE_SERVICE_GEM_NOC_2 17 123#define SLAVE_SERVICE_GEM_NOC 18 124#define MASTER_MNOC_HF_MEM_NOC_DISP 19 125#define MASTER_MNOC_SF_MEM_NOC_DISP 20 126#define SLAVE_LLCC_DISP 21 127 128#define MASTER_CNOC_LPASS_AG_NOC 0 129#define SLAVE_LPASS_CORE_CFG 1 130#define SLAVE_LPASS_LPI_CFG 2 131#define SLAVE_LPASS_MPU_CFG 3 132#define SLAVE_LPASS_TOP_CFG 4 133#define SLAVE_SERVICES_LPASS_AML_NOC 5 134#define SLAVE_SERVICE_LPASS_AG_NOC 6 135 136#define MASTER_LLCC 0 137#define SLAVE_EBI1 1 138#define MASTER_LLCC_DISP 2 139#define SLAVE_EBI1_DISP 3 140 141#define MASTER_CAMNOC_HF 0 142#define MASTER_CAMNOC_ICP 1 143#define MASTER_CAMNOC_SF 2 144#define MASTER_CNOC_MNOC_CFG 3 145#define MASTER_VIDEO_P0 4 146#define MASTER_VIDEO_P1 5 147#define MASTER_VIDEO_PROC 6 148#define MASTER_MDP0 7 149#define MASTER_MDP1 8 150#define MASTER_ROTATOR 9 151#define SLAVE_MNOC_HF_MEM_NOC 10 152#define SLAVE_MNOC_SF_MEM_NOC 11 153#define SLAVE_SERVICE_MNOC 12 154#define MASTER_MDP0_DISP 13 155#define MASTER_MDP1_DISP 14 156#define MASTER_ROTATOR_DISP 15 157#define SLAVE_MNOC_HF_MEM_NOC_DISP 16 158#define SLAVE_MNOC_SF_MEM_NOC_DISP 17 159 160#define MASTER_CDSP_NOC_CFG 0 161#define MASTER_CDSP_PROC 1 162#define SLAVE_CDSP_MEM_NOC 2 163#define SLAVE_SERVICE_NSP_NOC 3 164 165#define MASTER_A1NOC_SNOC 0 166#define MASTER_A2NOC_SNOC 1 167#define MASTER_SNOC_CFG 2 168#define MASTER_PIMEM 3 169#define MASTER_GIC 4 170#define SLAVE_SNOC_GEM_NOC_GC 5 171#define SLAVE_SNOC_GEM_NOC_SF 6 172#define SLAVE_SERVICE_SNOC 7 173 174#endif 175