qcom,sm8550-rpmh.h revision 1.1.1.1
1/* $NetBSD: qcom,sm8550-rpmh.h,v 1.1.1.1 2026/01/18 05:21:46 skrll Exp $ */ 2 3/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 4/* 5 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 6 * Copyright (c) 2022, Linaro Limited 7 */ 8 9#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8550_H 10#define __DT_BINDINGS_INTERCONNECT_QCOM_SM8550_H 11 12#define MASTER_QSPI_0 0 13#define MASTER_QUP_1 1 14#define MASTER_SDCC_4 2 15#define MASTER_UFS_MEM 3 16#define MASTER_USB3_0 4 17#define SLAVE_A1NOC_SNOC 5 18 19#define MASTER_QDSS_BAM 0 20#define MASTER_QUP_2 1 21#define MASTER_CRYPTO 2 22#define MASTER_IPA 3 23#define MASTER_SP 4 24#define MASTER_QDSS_ETR 5 25#define MASTER_QDSS_ETR_1 6 26#define MASTER_SDCC_2 7 27#define SLAVE_A2NOC_SNOC 8 28 29#define MASTER_QUP_CORE_0 0 30#define MASTER_QUP_CORE_1 1 31#define MASTER_QUP_CORE_2 2 32#define SLAVE_QUP_CORE_0 3 33#define SLAVE_QUP_CORE_1 4 34#define SLAVE_QUP_CORE_2 5 35 36#define MASTER_CNOC_CFG 0 37#define SLAVE_AHB2PHY_SOUTH 1 38#define SLAVE_AHB2PHY_NORTH 2 39#define SLAVE_APPSS 3 40#define SLAVE_CAMERA_CFG 4 41#define SLAVE_CLK_CTL 5 42#define SLAVE_RBCPR_CX_CFG 6 43#define SLAVE_RBCPR_MMCX_CFG 7 44#define SLAVE_RBCPR_MXA_CFG 8 45#define SLAVE_RBCPR_MXC_CFG 9 46#define SLAVE_CPR_NSPCX 10 47#define SLAVE_CRYPTO_0_CFG 11 48#define SLAVE_CX_RDPM 12 49#define SLAVE_DISPLAY_CFG 13 50#define SLAVE_GFX3D_CFG 14 51#define SLAVE_I2C 15 52#define SLAVE_IMEM_CFG 16 53#define SLAVE_IPA_CFG 17 54#define SLAVE_IPC_ROUTER_CFG 18 55#define SLAVE_CNOC_MSS 19 56#define SLAVE_MX_RDPM 20 57#define SLAVE_PCIE_0_CFG 21 58#define SLAVE_PCIE_1_CFG 22 59#define SLAVE_PDM 23 60#define SLAVE_PIMEM_CFG 24 61#define SLAVE_PRNG 25 62#define SLAVE_QDSS_CFG 26 63#define SLAVE_QSPI_0 27 64#define SLAVE_QUP_1 28 65#define SLAVE_QUP_2 29 66#define SLAVE_SDCC_2 30 67#define SLAVE_SDCC_4 31 68#define SLAVE_SPSS_CFG 32 69#define SLAVE_TCSR 33 70#define SLAVE_TLMM 34 71#define SLAVE_UFS_MEM_CFG 35 72#define SLAVE_USB3_0 36 73#define SLAVE_VENUS_CFG 37 74#define SLAVE_VSENSE_CTRL_CFG 38 75#define SLAVE_LPASS_QTB_CFG 39 76#define SLAVE_CNOC_MNOC_CFG 40 77#define SLAVE_NSP_QTB_CFG 41 78#define SLAVE_PCIE_ANOC_CFG 42 79#define SLAVE_QDSS_STM 43 80#define SLAVE_TCU 44 81 82#define MASTER_GEM_NOC_CNOC 0 83#define MASTER_GEM_NOC_PCIE_SNOC 1 84#define SLAVE_AOSS 2 85#define SLAVE_TME_CFG 3 86#define SLAVE_CNOC_CFG 4 87#define SLAVE_DDRSS_CFG 5 88#define SLAVE_BOOT_IMEM 6 89#define SLAVE_IMEM 7 90#define SLAVE_PCIE_0 8 91#define SLAVE_PCIE_1 9 92 93#define MASTER_GPU_TCU 0 94#define MASTER_SYS_TCU 1 95#define MASTER_APPSS_PROC 2 96#define MASTER_GFX3D 3 97#define MASTER_LPASS_GEM_NOC 4 98#define MASTER_MSS_PROC 5 99#define MASTER_MNOC_HF_MEM_NOC 6 100#define MASTER_MNOC_SF_MEM_NOC 7 101#define MASTER_COMPUTE_NOC 8 102#define MASTER_ANOC_PCIE_GEM_NOC 9 103#define MASTER_SNOC_GC_MEM_NOC 10 104#define MASTER_SNOC_SF_MEM_NOC 11 105#define SLAVE_GEM_NOC_CNOC 12 106#define SLAVE_LLCC 13 107#define SLAVE_MEM_NOC_PCIE_SNOC 14 108#define MASTER_MNOC_HF_MEM_NOC_DISP 15 109#define MASTER_ANOC_PCIE_GEM_NOC_DISP 16 110#define SLAVE_LLCC_DISP 17 111#define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_0 18 112#define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_0 19 113#define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_0 20 114#define SLAVE_LLCC_CAM_IFE_0 21 115#define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_1 22 116#define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_1 23 117#define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_1 24 118#define SLAVE_LLCC_CAM_IFE_1 25 119#define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_2 26 120#define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_2 27 121#define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_2 28 122#define SLAVE_LLCC_CAM_IFE_2 29 123 124#define MASTER_LPIAON_NOC 0 125#define SLAVE_LPASS_GEM_NOC 1 126 127#define MASTER_LPASS_LPINOC 0 128#define SLAVE_LPIAON_NOC_LPASS_AG_NOC 1 129 130#define MASTER_LPASS_PROC 0 131#define SLAVE_LPICX_NOC_LPIAON_NOC 1 132 133#define MASTER_LLCC 0 134#define SLAVE_EBI1 1 135#define MASTER_LLCC_DISP 2 136#define SLAVE_EBI1_DISP 3 137#define MASTER_LLCC_CAM_IFE_0 4 138#define SLAVE_EBI1_CAM_IFE_0 5 139#define MASTER_LLCC_CAM_IFE_1 6 140#define SLAVE_EBI1_CAM_IFE_1 7 141#define MASTER_LLCC_CAM_IFE_2 8 142#define SLAVE_EBI1_CAM_IFE_2 9 143 144#define MASTER_CAMNOC_HF 0 145#define MASTER_CAMNOC_ICP 1 146#define MASTER_CAMNOC_SF 2 147#define MASTER_MDP 3 148#define MASTER_CDSP_HCP 4 149#define MASTER_VIDEO 5 150#define MASTER_VIDEO_CV_PROC 6 151#define MASTER_VIDEO_PROC 7 152#define MASTER_VIDEO_V_PROC 8 153#define MASTER_CNOC_MNOC_CFG 9 154#define SLAVE_MNOC_HF_MEM_NOC 10 155#define SLAVE_MNOC_SF_MEM_NOC 11 156#define SLAVE_SERVICE_MNOC 12 157#define MASTER_MDP_DISP 13 158#define SLAVE_MNOC_HF_MEM_NOC_DISP 14 159#define MASTER_CAMNOC_HF_CAM_IFE_0 15 160#define MASTER_CAMNOC_ICP_CAM_IFE_0 16 161#define MASTER_CAMNOC_SF_CAM_IFE_0 17 162#define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_0 18 163#define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_0 19 164#define MASTER_CAMNOC_HF_CAM_IFE_1 20 165#define MASTER_CAMNOC_ICP_CAM_IFE_1 21 166#define MASTER_CAMNOC_SF_CAM_IFE_1 22 167#define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_1 23 168#define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_1 24 169#define MASTER_CAMNOC_HF_CAM_IFE_2 25 170#define MASTER_CAMNOC_ICP_CAM_IFE_2 26 171#define MASTER_CAMNOC_SF_CAM_IFE_2 27 172#define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_2 28 173#define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_2 29 174 175#define MASTER_CDSP_PROC 0 176#define SLAVE_CDSP_MEM_NOC 1 177 178#define MASTER_PCIE_ANOC_CFG 0 179#define MASTER_PCIE_0 1 180#define MASTER_PCIE_1 2 181#define SLAVE_ANOC_PCIE_GEM_NOC 3 182#define SLAVE_SERVICE_PCIE_ANOC 4 183 184#define MASTER_GIC_AHB 0 185#define MASTER_A1NOC_SNOC 1 186#define MASTER_A2NOC_SNOC 2 187#define MASTER_GIC 3 188#define SLAVE_SNOC_GEM_NOC_GC 4 189#define SLAVE_SNOC_GEM_NOC_SF 5 190 191#endif 192