1 1.1 jmcneill /* $NetBSD: qcom,msm8916.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /* SPDX-License-Identifier: GPL-2.0 */ 4 1.1 jmcneill /* 5 1.1 jmcneill * Qualcomm interconnect IDs 6 1.1 jmcneill * 7 1.1 jmcneill * Copyright (c) 2019, Linaro Ltd. 8 1.1 jmcneill * Author: Georgi Djakov <georgi.djakov (at) linaro.org> 9 1.1 jmcneill */ 10 1.1 jmcneill 11 1.1 jmcneill #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H 12 1.1 jmcneill #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H 13 1.1 jmcneill 14 1.1 jmcneill #define BIMC_SNOC_SLV 0 15 1.1 jmcneill #define MASTER_JPEG 1 16 1.1 jmcneill #define MASTER_MDP_PORT0 2 17 1.1 jmcneill #define MASTER_QDSS_BAM 3 18 1.1 jmcneill #define MASTER_QDSS_ETR 4 19 1.1 jmcneill #define MASTER_SNOC_CFG 5 20 1.1 jmcneill #define MASTER_VFE 6 21 1.1 jmcneill #define MASTER_VIDEO_P0 7 22 1.1 jmcneill #define SNOC_MM_INT_0 8 23 1.1 jmcneill #define SNOC_MM_INT_1 9 24 1.1 jmcneill #define SNOC_MM_INT_2 10 25 1.1 jmcneill #define SNOC_MM_INT_BIMC 11 26 1.1 jmcneill #define PCNOC_SNOC_SLV 12 27 1.1 jmcneill #define SLAVE_APSS 13 28 1.1 jmcneill #define SLAVE_CATS_128 14 29 1.1 jmcneill #define SLAVE_OCMEM_64 15 30 1.1 jmcneill #define SLAVE_IMEM 16 31 1.1 jmcneill #define SLAVE_QDSS_STM 17 32 1.1 jmcneill #define SLAVE_SRVC_SNOC 18 33 1.1 jmcneill #define SNOC_BIMC_0_MAS 19 34 1.1 jmcneill #define SNOC_BIMC_1_MAS 20 35 1.1 jmcneill #define SNOC_INT_0 21 36 1.1 jmcneill #define SNOC_INT_1 22 37 1.1 jmcneill #define SNOC_INT_BIMC 23 38 1.1 jmcneill #define SNOC_PCNOC_MAS 24 39 1.1 jmcneill #define SNOC_QDSS_INT 25 40 1.1 jmcneill 41 1.1 jmcneill #define BIMC_SNOC_MAS 0 42 1.1 jmcneill #define MASTER_AMPSS_M0 1 43 1.1 jmcneill #define MASTER_GRAPHICS_3D 2 44 1.1 jmcneill #define MASTER_TCU0 3 45 1.1 jmcneill #define MASTER_TCU1 4 46 1.1 jmcneill #define SLAVE_AMPSS_L2 5 47 1.1 jmcneill #define SLAVE_EBI_CH0 6 48 1.1 jmcneill #define SNOC_BIMC_0_SLV 7 49 1.1 jmcneill #define SNOC_BIMC_1_SLV 8 50 1.1 jmcneill 51 1.1 jmcneill #define MASTER_BLSP_1 0 52 1.1 jmcneill #define MASTER_DEHR 1 53 1.1 jmcneill #define MASTER_LPASS 2 54 1.1 jmcneill #define MASTER_CRYPTO_CORE0 3 55 1.1 jmcneill #define MASTER_SDCC_1 4 56 1.1 jmcneill #define MASTER_SDCC_2 5 57 1.1 jmcneill #define MASTER_SPDM 6 58 1.1 jmcneill #define MASTER_USB_HS 7 59 1.1 jmcneill #define PCNOC_INT_0 8 60 1.1 jmcneill #define PCNOC_INT_1 9 61 1.1 jmcneill #define PCNOC_MAS_0 10 62 1.1 jmcneill #define PCNOC_MAS_1 11 63 1.1 jmcneill #define PCNOC_SLV_0 12 64 1.1 jmcneill #define PCNOC_SLV_1 13 65 1.1 jmcneill #define PCNOC_SLV_2 14 66 1.1 jmcneill #define PCNOC_SLV_3 15 67 1.1 jmcneill #define PCNOC_SLV_4 16 68 1.1 jmcneill #define PCNOC_SLV_8 17 69 1.1 jmcneill #define PCNOC_SLV_9 18 70 1.1 jmcneill #define PCNOC_SNOC_MAS 19 71 1.1 jmcneill #define SLAVE_BIMC_CFG 20 72 1.1 jmcneill #define SLAVE_BLSP_1 21 73 1.1 jmcneill #define SLAVE_BOOT_ROM 22 74 1.1 jmcneill #define SLAVE_CAMERA_CFG 23 75 1.1 jmcneill #define SLAVE_CLK_CTL 24 76 1.1 jmcneill #define SLAVE_CRYPTO_0_CFG 25 77 1.1 jmcneill #define SLAVE_DEHR_CFG 26 78 1.1 jmcneill #define SLAVE_DISPLAY_CFG 27 79 1.1 jmcneill #define SLAVE_GRAPHICS_3D_CFG 28 80 1.1 jmcneill #define SLAVE_IMEM_CFG 29 81 1.1 jmcneill #define SLAVE_LPASS 30 82 1.1 jmcneill #define SLAVE_MPM 31 83 1.1 jmcneill #define SLAVE_MSG_RAM 32 84 1.1 jmcneill #define SLAVE_MSS 33 85 1.1 jmcneill #define SLAVE_PDM 34 86 1.1 jmcneill #define SLAVE_PMIC_ARB 35 87 1.1 jmcneill #define SLAVE_PCNOC_CFG 36 88 1.1 jmcneill #define SLAVE_PRNG 37 89 1.1 jmcneill #define SLAVE_QDSS_CFG 38 90 1.1 jmcneill #define SLAVE_RBCPR_CFG 39 91 1.1 jmcneill #define SLAVE_SDCC_1 40 92 1.1 jmcneill #define SLAVE_SDCC_2 41 93 1.1 jmcneill #define SLAVE_SECURITY 42 94 1.1 jmcneill #define SLAVE_SNOC_CFG 43 95 1.1 jmcneill #define SLAVE_SPDM 44 96 1.1 jmcneill #define SLAVE_TCSR 45 97 1.1 jmcneill #define SLAVE_TLMM 46 98 1.1 jmcneill #define SLAVE_USB_HS 47 99 1.1 jmcneill #define SLAVE_VENUS_CFG 48 100 1.1 jmcneill #define SNOC_PCNOC_SLV 49 101 1.1 jmcneill 102 1.1 jmcneill #endif 103