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      1  1.1  jmcneill /*	$NetBSD: qcom,sdx55.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $	*/
      2  1.1  jmcneill 
      3  1.1  jmcneill /* SPDX-License-Identifier: GPL-2.0 */
      4  1.1  jmcneill /*
      5  1.1  jmcneill  * Qualcomm SDX55 interconnect IDs
      6  1.1  jmcneill  *
      7  1.1  jmcneill  * Copyright (c) 2021, Linaro Ltd.
      8  1.1  jmcneill  * Author: Manivannan Sadhasivam <manivannan.sadhasivam (at) linaro.org>
      9  1.1  jmcneill  */
     10  1.1  jmcneill 
     11  1.1  jmcneill #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX55_H
     12  1.1  jmcneill #define __DT_BINDINGS_INTERCONNECT_QCOM_SDX55_H
     13  1.1  jmcneill 
     14  1.1  jmcneill #define MASTER_LLCC			0
     15  1.1  jmcneill #define SLAVE_EBI_CH0			1
     16  1.1  jmcneill 
     17  1.1  jmcneill #define MASTER_TCU_0			0
     18  1.1  jmcneill #define MASTER_SNOC_GC_MEM_NOC		1
     19  1.1  jmcneill #define MASTER_AMPSS_M0			2
     20  1.1  jmcneill #define SLAVE_LLCC			3
     21  1.1  jmcneill #define SLAVE_MEM_NOC_SNOC		4
     22  1.1  jmcneill #define SLAVE_MEM_NOC_PCIE_SNOC		5
     23  1.1  jmcneill 
     24  1.1  jmcneill #define MASTER_AUDIO			0
     25  1.1  jmcneill #define MASTER_BLSP_1			1
     26  1.1  jmcneill #define MASTER_QDSS_BAM			2
     27  1.1  jmcneill #define MASTER_QPIC			3
     28  1.1  jmcneill #define MASTER_SNOC_CFG			4
     29  1.1  jmcneill #define MASTER_SPMI_FETCHER		5
     30  1.1  jmcneill #define MASTER_ANOC_SNOC		6
     31  1.1  jmcneill #define MASTER_IPA			7
     32  1.1  jmcneill #define MASTER_MEM_NOC_SNOC		8
     33  1.1  jmcneill #define MASTER_MEM_NOC_PCIE_SNOC	9
     34  1.1  jmcneill #define MASTER_CRYPTO_CORE_0		10
     35  1.1  jmcneill #define MASTER_EMAC			11
     36  1.1  jmcneill #define MASTER_IPA_PCIE			12
     37  1.1  jmcneill #define MASTER_PCIE			13
     38  1.1  jmcneill #define MASTER_QDSS_ETR			14
     39  1.1  jmcneill #define MASTER_SDCC_1			15
     40  1.1  jmcneill #define MASTER_USB3			16
     41  1.1  jmcneill #define SLAVE_AOP			17
     42  1.1  jmcneill #define SLAVE_AOSS			18
     43  1.1  jmcneill #define SLAVE_APPSS			19
     44  1.1  jmcneill #define SLAVE_AUDIO			20
     45  1.1  jmcneill #define SLAVE_BLSP_1			21
     46  1.1  jmcneill #define SLAVE_CLK_CTL			22
     47  1.1  jmcneill #define SLAVE_CRYPTO_0_CFG		23
     48  1.1  jmcneill #define SLAVE_CNOC_DDRSS		24
     49  1.1  jmcneill #define SLAVE_ECC_CFG			25
     50  1.1  jmcneill #define SLAVE_EMAC_CFG			26
     51  1.1  jmcneill #define SLAVE_IMEM_CFG			27
     52  1.1  jmcneill #define SLAVE_IPA_CFG			28
     53  1.1  jmcneill #define SLAVE_CNOC_MSS			29
     54  1.1  jmcneill #define SLAVE_PCIE_PARF			30
     55  1.1  jmcneill #define SLAVE_PDM			31
     56  1.1  jmcneill #define SLAVE_PRNG			32
     57  1.1  jmcneill #define SLAVE_QDSS_CFG			33
     58  1.1  jmcneill #define SLAVE_QPIC			34
     59  1.1  jmcneill #define SLAVE_SDCC_1			35
     60  1.1  jmcneill #define SLAVE_SNOC_CFG			36
     61  1.1  jmcneill #define SLAVE_SPMI_FETCHER		37
     62  1.1  jmcneill #define SLAVE_SPMI_VGI_COEX		38
     63  1.1  jmcneill #define SLAVE_TCSR			39
     64  1.1  jmcneill #define SLAVE_TLMM			40
     65  1.1  jmcneill #define SLAVE_USB3			41
     66  1.1  jmcneill #define SLAVE_USB3_PHY_CFG		42
     67  1.1  jmcneill #define SLAVE_ANOC_SNOC			43
     68  1.1  jmcneill #define SLAVE_SNOC_MEM_NOC_GC		44
     69  1.1  jmcneill #define SLAVE_OCIMEM			45
     70  1.1  jmcneill #define SLAVE_SERVICE_SNOC		46
     71  1.1  jmcneill #define SLAVE_PCIE_0			47
     72  1.1  jmcneill #define SLAVE_QDSS_STM			48
     73  1.1  jmcneill #define SLAVE_TCU			49
     74  1.1  jmcneill 
     75  1.1  jmcneill #define MASTER_IPA_CORE			0
     76  1.1  jmcneill #define SLAVE_IPA_CORE			1
     77  1.1  jmcneill 
     78  1.1  jmcneill #endif
     79